1*4882a593SmuzhiyunQualcomm SPMI Regulators 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun- compatible: 4*4882a593Smuzhiyun Usage: required 5*4882a593Smuzhiyun Value type: <string> 6*4882a593Smuzhiyun Definition: must be one of: 7*4882a593Smuzhiyun "qcom,pm8004-regulators" 8*4882a593Smuzhiyun "qcom,pm8005-regulators" 9*4882a593Smuzhiyun "qcom,pm8841-regulators" 10*4882a593Smuzhiyun "qcom,pm8916-regulators" 11*4882a593Smuzhiyun "qcom,pm8941-regulators" 12*4882a593Smuzhiyun "qcom,pm8950-regulators" 13*4882a593Smuzhiyun "qcom,pm8994-regulators" 14*4882a593Smuzhiyun "qcom,pmi8994-regulators" 15*4882a593Smuzhiyun "qcom,pm660-regulators" 16*4882a593Smuzhiyun "qcom,pm660l-regulators" 17*4882a593Smuzhiyun "qcom,pms405-regulators" 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun- interrupts: 20*4882a593Smuzhiyun Usage: optional 21*4882a593Smuzhiyun Value type: <prop-encoded-array> 22*4882a593Smuzhiyun Definition: List of OCP interrupts. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun- interrupt-names: 25*4882a593Smuzhiyun Usage: required if 'interrupts' property present 26*4882a593Smuzhiyun Value type: <string-array> 27*4882a593Smuzhiyun Definition: List of strings defining the names of the 28*4882a593Smuzhiyun interrupts in the 'interrupts' property 1-to-1. 29*4882a593Smuzhiyun Supported values are "ocp-<regulator_name>", where 30*4882a593Smuzhiyun <regulator_name> corresponds to a voltage switch 31*4882a593Smuzhiyun type regulator. 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun- vdd_s1-supply: 34*4882a593Smuzhiyun- vdd_s2-supply: 35*4882a593Smuzhiyun- vdd_s3-supply: 36*4882a593Smuzhiyun- vdd_s4-supply: 37*4882a593Smuzhiyun- vdd_s5-supply: 38*4882a593Smuzhiyun- vdd_s6-supply: 39*4882a593Smuzhiyun- vdd_s7-supply: 40*4882a593Smuzhiyun- vdd_s8-supply: 41*4882a593Smuzhiyun Usage: optional (pm8841 only) 42*4882a593Smuzhiyun Value type: <phandle> 43*4882a593Smuzhiyun Definition: Reference to regulator supplying the input pin, as 44*4882a593Smuzhiyun described in the data sheet. 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun- vdd_s1-supply: 47*4882a593Smuzhiyun- vdd_s2-supply: 48*4882a593Smuzhiyun- vdd_s3-supply: 49*4882a593Smuzhiyun- vdd_s4-supply: 50*4882a593Smuzhiyun- vdd_l1_l3-supply: 51*4882a593Smuzhiyun- vdd_l2-supply: 52*4882a593Smuzhiyun- vdd_l4_l5_l6-supply: 53*4882a593Smuzhiyun- vdd_l7-supply: 54*4882a593Smuzhiyun- vdd_l8_l11_l14_l15_l16-supply: 55*4882a593Smuzhiyun- vdd_l9_l10_l12_l13_l17_l18-supply: 56*4882a593Smuzhiyun Usage: optional (pm8916 only) 57*4882a593Smuzhiyun Value type: <phandle> 58*4882a593Smuzhiyun Definition: Reference to regulator supplying the input pin, as 59*4882a593Smuzhiyun described in the data sheet. 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun- vdd_s1-supply: 62*4882a593Smuzhiyun- vdd_s2-supply: 63*4882a593Smuzhiyun- vdd_s3-supply: 64*4882a593Smuzhiyun- vdd_l1_l3-supply: 65*4882a593Smuzhiyun- vdd_l2_lvs_1_2_3-supply: 66*4882a593Smuzhiyun- vdd_l4_l11-supply: 67*4882a593Smuzhiyun- vdd_l5_l7-supply: 68*4882a593Smuzhiyun- vdd_l6_l12_l14_l15-supply: 69*4882a593Smuzhiyun- vdd_l8_l16_l18_19-supply: 70*4882a593Smuzhiyun- vdd_l9_l10_l17_l22-supply: 71*4882a593Smuzhiyun- vdd_l13_l20_l23_l24-supply: 72*4882a593Smuzhiyun- vdd_l21-supply: 73*4882a593Smuzhiyun- vin_5vs-supply: 74*4882a593Smuzhiyun Usage: optional (pm8941 only) 75*4882a593Smuzhiyun Value type: <phandle> 76*4882a593Smuzhiyun Definition: Reference to regulator supplying the input pin, as 77*4882a593Smuzhiyun described in the data sheet. 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun- vdd_s1-supply: 80*4882a593Smuzhiyun- vdd_s2-supply: 81*4882a593Smuzhiyun- vdd_s3-supply: 82*4882a593Smuzhiyun- vdd_s4-supply: 83*4882a593Smuzhiyun- vdd_s4-supply: 84*4882a593Smuzhiyun- vdd_s5-supply: 85*4882a593Smuzhiyun- vdd_s6-supply: 86*4882a593Smuzhiyun- vdd_l1_l19-supply: 87*4882a593Smuzhiyun- vdd_l2_l23-supply: 88*4882a593Smuzhiyun- vdd_l3-supply: 89*4882a593Smuzhiyun- vdd_l4_l5_l6_l7_l16-supply: 90*4882a593Smuzhiyun- vdd_l8_l11_l12_l17_l22-supply: 91*4882a593Smuzhiyun- vdd_l9_l10_l13_l14_l15_l18-supply: 92*4882a593Smuzhiyun- vdd_l20-supply: 93*4882a593Smuzhiyun- vdd_l21-supply: 94*4882a593Smuzhiyun Usage: optional (pm8950 only) 95*4882a593Smuzhiyun Value type: <phandle> 96*4882a593Smuzhiyun Definition: reference to regulator supplying the input pin, as 97*4882a593Smuzhiyun described in the data sheet 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun- vdd_s1-supply: 100*4882a593Smuzhiyun- vdd_s2-supply: 101*4882a593Smuzhiyun- vdd_s3-supply: 102*4882a593Smuzhiyun- vdd_s4-supply: 103*4882a593Smuzhiyun- vdd_s5-supply: 104*4882a593Smuzhiyun- vdd_s6-supply: 105*4882a593Smuzhiyun- vdd_s7-supply: 106*4882a593Smuzhiyun- vdd_s8-supply: 107*4882a593Smuzhiyun- vdd_s9-supply: 108*4882a593Smuzhiyun- vdd_s10-supply: 109*4882a593Smuzhiyun- vdd_s11-supply: 110*4882a593Smuzhiyun- vdd_s12-supply: 111*4882a593Smuzhiyun- vdd_l1-supply: 112*4882a593Smuzhiyun- vdd_l2_l26_l28-supply: 113*4882a593Smuzhiyun- vdd_l3_l11-supply: 114*4882a593Smuzhiyun- vdd_l4_l27_l31-supply: 115*4882a593Smuzhiyun- vdd_l5_l7-supply: 116*4882a593Smuzhiyun- vdd_l6_l12_l32-supply: 117*4882a593Smuzhiyun- vdd_l8_l16_l30-supply: 118*4882a593Smuzhiyun- vdd_l9_l10_l18_l22-supply: 119*4882a593Smuzhiyun- vdd_l13_l19_l23_l24-supply: 120*4882a593Smuzhiyun- vdd_l14_l15-supply: 121*4882a593Smuzhiyun- vdd_l17_l29-supply: 122*4882a593Smuzhiyun- vdd_l20_l21-supply: 123*4882a593Smuzhiyun- vdd_l25-supply: 124*4882a593Smuzhiyun- vdd_lvs_1_2-supply: 125*4882a593Smuzhiyun Usage: optional (pm8994 only) 126*4882a593Smuzhiyun Value type: <phandle> 127*4882a593Smuzhiyun Definition: Reference to regulator supplying the input pin, as 128*4882a593Smuzhiyun described in the data sheet. 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun- vdd_s1-supply: 131*4882a593Smuzhiyun- vdd_s2-supply: 132*4882a593Smuzhiyun- vdd_s3-supply: 133*4882a593Smuzhiyun- vdd_l1-supply: 134*4882a593Smuzhiyun Usage: optional (pmi8994 only) 135*4882a593Smuzhiyun Value type: <phandle> 136*4882a593Smuzhiyun Definition: Reference to regulator supplying the input pin, as 137*4882a593Smuzhiyun described in the data sheet. 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun- vdd_l1_l6_l7-supply: 140*4882a593Smuzhiyun- vdd_l2_l3-supply: 141*4882a593Smuzhiyun- vdd_l5-supply: 142*4882a593Smuzhiyun- vdd_l8_l9_l10_l11_l12_l13_l14-supply: 143*4882a593Smuzhiyun- vdd_l15_l16_l17_l18_l19-supply: 144*4882a593Smuzhiyun- vdd_s1-supply: 145*4882a593Smuzhiyun- vdd_s2-supply: 146*4882a593Smuzhiyun- vdd_s3-supply: 147*4882a593Smuzhiyun- vdd_s5-supply: 148*4882a593Smuzhiyun- vdd_s6-supply: 149*4882a593Smuzhiyun Usage: optional (pm660 only) 150*4882a593Smuzhiyun Value type: <phandle> 151*4882a593Smuzhiyun Definition: Reference to regulator supplying the input pin, as 152*4882a593Smuzhiyun described in the data sheet. 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun- vdd_l1_l9_l10-supply: 155*4882a593Smuzhiyun- vdd_l2-supply: 156*4882a593Smuzhiyun- vdd_l3_l5_l7_l8-supply: 157*4882a593Smuzhiyun- vdd_l4_l6-supply: 158*4882a593Smuzhiyun- vdd_s1-supply: 159*4882a593Smuzhiyun- vdd_s2-supply: 160*4882a593Smuzhiyun- vdd_s3-supply: 161*4882a593Smuzhiyun- vdd_s4-supply: 162*4882a593Smuzhiyun- vdd_s5-supply: 163*4882a593Smuzhiyun Usage: optional (pm660l only) 164*4882a593Smuzhiyun Value type: <phandle> 165*4882a593Smuzhiyun Definition: Reference to regulator supplying the input pin, as 166*4882a593Smuzhiyun described in the data sheet. 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun- vdd_l1_l2-supply: 169*4882a593Smuzhiyun- vdd_l3_l8-supply: 170*4882a593Smuzhiyun- vdd_l4-supply: 171*4882a593Smuzhiyun- vdd_l5_l6-supply: 172*4882a593Smuzhiyun- vdd_l10_l11_l12_l13-supply: 173*4882a593Smuzhiyun- vdd_l7-supply: 174*4882a593Smuzhiyun- vdd_l9-supply: 175*4882a593Smuzhiyun- vdd_s1-supply: 176*4882a593Smuzhiyun- vdd_s2-supply: 177*4882a593Smuzhiyun- vdd_s3-supply: 178*4882a593Smuzhiyun- vdd_s4-supply: 179*4882a593Smuzhiyun- vdd_s5-supply 180*4882a593Smuzhiyun Usage: optional (pms405 only) 181*4882a593Smuzhiyun Value type: <phandle> 182*4882a593Smuzhiyun Definition: Reference to regulator supplying the input pin, as 183*4882a593Smuzhiyun described in the data sheet. 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun- qcom,saw-reg: 186*4882a593Smuzhiyun Usage: optional 187*4882a593Smuzhiyun Value type: <phandle> 188*4882a593Smuzhiyun Description: Reference to syscon node defining the SAW registers. 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun 191*4882a593SmuzhiyunThe regulator node houses sub-nodes for each regulator within the device. Each 192*4882a593Smuzhiyunsub-node is identified using the node's name, with valid values listed for each 193*4882a593Smuzhiyunof the PMICs below. 194*4882a593Smuzhiyun 195*4882a593Smuzhiyunpm8004: 196*4882a593Smuzhiyun s2, s5 197*4882a593Smuzhiyun 198*4882a593Smuzhiyunpm8005: 199*4882a593Smuzhiyun s1, s2, s3, s4 200*4882a593Smuzhiyun 201*4882a593Smuzhiyunpm8841: 202*4882a593Smuzhiyun s1, s2, s3, s4, s5, s6, s7, s8 203*4882a593Smuzhiyun 204*4882a593Smuzhiyunpm8916: 205*4882a593Smuzhiyun s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, 206*4882a593Smuzhiyun l14, l15, l16, l17, l18 207*4882a593Smuzhiyun 208*4882a593Smuzhiyunpm8941: 209*4882a593Smuzhiyun s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, 210*4882a593Smuzhiyun l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3, 211*4882a593Smuzhiyun 5vs1, 5vs2 212*4882a593Smuzhiyun 213*4882a593Smuzhiyunpm8994: 214*4882a593Smuzhiyun s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, l4, l5, 215*4882a593Smuzhiyun l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, 216*4882a593Smuzhiyun l21, l22, l23, l24, l25, l26, l27, l28, l29, l30, l31, l32, lvs1, lvs2 217*4882a593Smuzhiyun 218*4882a593Smuzhiyunpmi8994: 219*4882a593Smuzhiyun s1, s2, s3, l1 220*4882a593Smuzhiyun 221*4882a593SmuzhiyunThe content of each sub-node is defined by the standard binding for regulators - 222*4882a593Smuzhiyunsee regulator.txt - with additional custom properties described below: 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun- regulator-initial-mode: 225*4882a593Smuzhiyun Usage: optional 226*4882a593Smuzhiyun Value type: <u32> 227*4882a593Smuzhiyun Description: 2 = Set initial mode to auto mode (automatically select 228*4882a593Smuzhiyun between HPM and LPM); not available on boost type 229*4882a593Smuzhiyun regulators. 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun 1 = Set initial mode to high power mode (HPM), also referred 232*4882a593Smuzhiyun to as NPM. HPM consumes more ground current than LPM, but 233*4882a593Smuzhiyun it can source significantly higher load current. HPM is not 234*4882a593Smuzhiyun available on boost type regulators. For voltage switch type 235*4882a593Smuzhiyun regulators, HPM implies that over current protection and 236*4882a593Smuzhiyun soft start are active all the time. 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun 0 = Set initial mode to low power mode (LPM). 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun- qcom,ocp-max-retries: 241*4882a593Smuzhiyun Usage: optional 242*4882a593Smuzhiyun Value type: <u32> 243*4882a593Smuzhiyun Description: Maximum number of times to try toggling a voltage switch 244*4882a593Smuzhiyun off and back on as a result of consecutive over current 245*4882a593Smuzhiyun events. 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun- qcom,ocp-retry-delay: 248*4882a593Smuzhiyun Usage: optional 249*4882a593Smuzhiyun Value type: <u32> 250*4882a593Smuzhiyun Description: Time to delay in milliseconds between each voltage switch 251*4882a593Smuzhiyun toggle after an over current event takes place. 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun- qcom,pin-ctrl-enable: 254*4882a593Smuzhiyun Usage: optional 255*4882a593Smuzhiyun Value type: <u32> 256*4882a593Smuzhiyun Description: Bit mask specifying which hardware pins should be used to 257*4882a593Smuzhiyun enable the regulator, if any; supported bits are: 258*4882a593Smuzhiyun 0 = ignore all hardware enable signals 259*4882a593Smuzhiyun BIT(0) = follow HW0_EN signal 260*4882a593Smuzhiyun BIT(1) = follow HW1_EN signal 261*4882a593Smuzhiyun BIT(2) = follow HW2_EN signal 262*4882a593Smuzhiyun BIT(3) = follow HW3_EN signal 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun- qcom,pin-ctrl-hpm: 265*4882a593Smuzhiyun Usage: optional 266*4882a593Smuzhiyun Value type: <u32> 267*4882a593Smuzhiyun Description: Bit mask specifying which hardware pins should be used to 268*4882a593Smuzhiyun force the regulator into high power mode, if any; 269*4882a593Smuzhiyun supported bits are: 270*4882a593Smuzhiyun 0 = ignore all hardware enable signals 271*4882a593Smuzhiyun BIT(0) = follow HW0_EN signal 272*4882a593Smuzhiyun BIT(1) = follow HW1_EN signal 273*4882a593Smuzhiyun BIT(2) = follow HW2_EN signal 274*4882a593Smuzhiyun BIT(3) = follow HW3_EN signal 275*4882a593Smuzhiyun BIT(4) = follow PMIC awake state 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun- qcom,vs-soft-start-strength: 278*4882a593Smuzhiyun Usage: optional 279*4882a593Smuzhiyun Value type: <u32> 280*4882a593Smuzhiyun Description: This property sets the soft start strength for voltage 281*4882a593Smuzhiyun switch type regulators; supported values are: 282*4882a593Smuzhiyun 0 = 0.05 uA 283*4882a593Smuzhiyun 1 = 0.25 uA 284*4882a593Smuzhiyun 2 = 0.55 uA 285*4882a593Smuzhiyun 3 = 0.75 uA 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun- qcom,saw-slave: 288*4882a593Smuzhiyun Usage: optional 289*4882a593Smuzhiyun Value type: <boo> 290*4882a593Smuzhiyun Description: SAW controlled gang slave. Will not be configured. 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun- qcom,saw-leader: 293*4882a593Smuzhiyun Usage: optional 294*4882a593Smuzhiyun Value type: <boo> 295*4882a593Smuzhiyun Description: SAW controlled gang leader. Will be configured as 296*4882a593Smuzhiyun SAW regulator. 297*4882a593Smuzhiyun 298*4882a593SmuzhiyunExample: 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun regulators { 301*4882a593Smuzhiyun compatible = "qcom,pm8941-regulators"; 302*4882a593Smuzhiyun vdd_l1_l3-supply = <&s1>; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun s1: s1 { 305*4882a593Smuzhiyun regulator-min-microvolt = <1300000>; 306*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun ... 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun l1: l1 { 312*4882a593Smuzhiyun regulator-min-microvolt = <1225000>; 313*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun .... 317*4882a593Smuzhiyun }; 318*4882a593Smuzhiyun 319*4882a593SmuzhiyunExample 2: 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun saw3: syscon@9A10000 { 322*4882a593Smuzhiyun compatible = "syscon"; 323*4882a593Smuzhiyun reg = <0x9A10000 0x1000>; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun ... 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun spm-regulators { 329*4882a593Smuzhiyun compatible = "qcom,pm8994-regulators"; 330*4882a593Smuzhiyun qcom,saw-reg = <&saw3>; 331*4882a593Smuzhiyun s8 { 332*4882a593Smuzhiyun qcom,saw-slave; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun s9 { 335*4882a593Smuzhiyun qcom,saw-slave; 336*4882a593Smuzhiyun }; 337*4882a593Smuzhiyun s10 { 338*4882a593Smuzhiyun qcom,saw-slave; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun pm8994_s11_saw: s11 { 341*4882a593Smuzhiyun qcom,saw-leader; 342*4882a593Smuzhiyun regulator-always-on; 343*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 344*4882a593Smuzhiyun regulator-max-microvolt = <1140000>; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun }; 347