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/OK3568_Linux_fs/kernel/include/uapi/linux/
H A Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
42 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
51 #define BMCR_RESET 0x8000 /* Reset to default state */
55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
[all …]
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
57 /* Media-dependent registers. */
58 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
59 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
60 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
61 * Lanes B-D are numbered 134-136. */
[all …]
/OK3568_Linux_fs/u-boot/include/linux/
H A Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
20 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
21 #define MII_STAT1000 0x0a /* 1000BASE-T status */
27 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
39 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
48 #define BMCR_RESET 0x8000 /* Reset to default state */
52 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
55 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
57 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
[all …]
H A Dmdio.h3 * Copyright 2006-2009 Solarflare Communications Inc.
23 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
43 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
44 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
47 /* Media-dependent registers. */
48 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
49 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
50 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
51 * Lanes B-D are numbered 134-136. */
52 #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/linux/
H A Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
42 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
51 #define BMCR_RESET 0x8000 /* Reset to default state */
55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
[all …]
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
53 /* Media-dependent registers. */
54 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
55 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
56 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
57 * Lanes B-D are numbered 134-136. */
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/linux/
H A Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
42 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
51 #define BMCR_RESET 0x8000 /* Reset to default state */
55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
[all …]
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
53 /* Media-dependent registers. */
54 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
55 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
56 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
57 * Lanes B-D are numbered 134-136. */
[all …]
/OK3568_Linux_fs/u-boot/common/
H A Dmiiphyutil.c5 * SPDX-License-Identifier: GPL-2.0+
9 * This provides a bit-banged interface to the ethernet MII management
51 if (strcmp(dev->name, devname) == 0) in miiphy_get_dev_by_name()
60 * Initialize global data. Need to be called before any other miiphy routine.
79 INIT_LIST_HEAD(&bus->link); in mdio_alloc()
91 if (!bus || !bus->read || !bus->write) in mdio_register()
92 return -1; in mdio_register()
95 if (miiphy_get_dev_by_name(bus->name)) { in mdio_register()
97 bus->name); in mdio_register()
98 return -1; in mdio_register()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-phy.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
21 This device interfaces to the MAC layer through Reduced GMII (RGMII) and
[all …]
/OK3568_Linux_fs/kernel/drivers/input/remotectl/
H A Drockchip_pwm_remotectl.c1 /* SPDX-License-Identifier: GPL-2.0 */
26 * modify code_print to change the value
60 void __iomem *base; member
93 num = ddata->maxkeybdnum; in remotectl_keybd_num_lookup()
95 if (remotectl_button[i].usercode == (ddata->scandata&0xFFFF)) { in remotectl_keybd_num_lookup()
96 ddata->keynum = i; in remotectl_keybd_num_lookup()
107 unsigned char keydata = (unsigned char)((ddata->scandata >> 8) & 0xff); in remotectl_keycode_lookup()
109 for (i = 0; i < remotectl_button[ddata->keynum].nbuttons; i++) { in remotectl_keycode_lookup()
110 if (remotectl_button[ddata->keynum].key_table[i].scancode == in remotectl_keycode_lookup()
112 ddata->keycode = in remotectl_keycode_lookup()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/
H A Di915_utils.h4 * Permission is hereby granted, free of charge, to any person obtaining a
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 #define FDO_BUG_URL "https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs"
40 /* Many gcc seem to no see through this and fall over :( */
42 #define WARN_ON(x) ({ \
43 bool __i915_warn_cond = (x); \
[all …]
/OK3568_Linux_fs/kernel/drivers/memory/
H A Domap-gpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
30 #include <linux/omap-gpmc.h>
34 #include <linux/platform_data/mtd-nand-omap2.h>
36 #define DEVICE_NAME "omap-gpmc"
94 * The first 1MB of GPMC address space is typically mapped to
95 * the internal ROM. Never allocate the first page, to
96 * facilitate bug detection; even if we didn't boot from ROM.
203 /* Structure to save gpmc cs context */
[all …]
/OK3568_Linux_fs/u-boot/drivers/net/
H A Dtsi108_eth.c5 * SPDX-License-Identifier: GPL-2.0+
45 #define __REG32(base, offset) (*((volatile u32 *)((char *)(base) + (offset)))) argument
47 #define reg_MAC_CONFIG_1(base) __REG32(base, 0x00000000) argument
62 #define reg_MAC_CONFIG_2(base) __REG32(base, 0x00000004) argument
71 #define INTERFACE_MODE_BYTE 2 /* 1000 Mb/s GMII/TBI */
73 #define reg_MAXIMUM_FRAME_LENGTH(base) __REG32(base, 0x00000010) argument
75 #define reg_MII_MGMT_CONFIG(base) __REG32(base, 0x00000020) argument
81 #define reg_MII_MGMT_COMMAND(base) __REG32(base, 0x00000024) argument
85 #define reg_MII_MGMT_ADDRESS(base) __REG32(base, 0x00000028) argument
86 #define reg_MII_MGMT_CONTROL(base) __REG32(base, 0x0000002c) argument
[all …]
/OK3568_Linux_fs/kernel/drivers/cpufreq/
H A Darmada-37xx-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
26 #include "cpufreq-dt.h"
66 #define ARMADA_37XX_AVS_VSET(x) (0x1C + 4 * (x)) argument
75 #define MIN_VOLT_MV 1000
107 * unstable because we do not know how to configure it properly.
109 /* {.cpu_freq_max = 1200*1000*1000, .divider = {1, 2, 4, 6} }, */
110 {.cpu_freq_max = 1000*1000*1000, .divider = {1, 2, 4, 5} },
111 {.cpu_freq_max = 800*1000*1000, .divider = {1, 2, 3, 4} },
112 {.cpu_freq_max = 600*1000*1000, .divider = {2, 4, 5, 6} },
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_crtc.c1 // SPDX-License-Identifier: GPL-2.0
29 for_each_new_connector_in_state(crtc_st->state, conn, conn_st, i) { in komeda_crtc_get_color_config()
30 if (conn_st->crtc != crtc_st->crtc) in komeda_crtc_get_color_config()
33 conn_bpc = conn->display_info.bpc ? conn->display_info.bpc : 8; in komeda_crtc_get_color_config()
34 conn_color_formats &= conn->display_info.color_formats; in komeda_crtc_get_color_config()
40 /* connector doesn't config any color_format, use RGB444 as default */ in komeda_crtc_get_color_config()
52 if (!kcrtc_st->base.active) { in komeda_crtc_update_clock_ratio()
53 kcrtc_st->clock_ratio = 0; in komeda_crtc_update_clock_ratio()
57 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; in komeda_crtc_update_clock_ratio()
60 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); in komeda_crtc_update_clock_ratio()
[all …]
/OK3568_Linux_fs/kernel/include/linux/
H A Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/mii.h: definitions for MII-compatible transceivers
53 return (struct mii_ioctl_data *) &rq->ifr_ifru; in if_mii()
65 * The one exception to IEEE 802.3u is that 100baseT4 is placed
66 * between 100T-full and 100T-half. If your phy does not support
68 * priority order, you will need to roll your own function.
90 * @duplex_lock: Non-zero if duplex is locked at full
112 * settings to phy autonegotiation advertisements for the
140 * settings to phy autonegotiation advertisements for the
168 * to ethtool advertisement settings.
[all …]
/OK3568_Linux_fs/kernel/drivers/ide/
H A Dqd65xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
7 * Version 0.03 Cleaned auto-tune, added probe
15 * To activate controller support, use "ide0=qd65xx"
20 * Samuel Thibault <samuel.thibault@ens-lyon.org>
40 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
41 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
42 * -- qd6500 is a single IDE interface
43 * -- qd6580 is a dual IDE interface
51 * base: Timer1
[all …]
/OK3568_Linux_fs/kernel/drivers/net/phy/
H A Dsfp-bus.c1 // SPDX-License-Identifier: GPL-2.0-only
20 * struct sfp_bus - internal representation of a sfp bus
50 /* Ubiquiti U-Fiber Instant module claims that support all transceiver in sfp_quirk_ubnt_uf_instant()
52 * modes and set only one mode which module supports: 1000baseX_Full. in sfp_quirk_ubnt_uf_instant()
55 phylink_set(modes, 1000baseX_Full); in sfp_quirk_ubnt_uf_instant()
60 // Alcatel Lucent G-010S-P can operate at 2500base-X, but
66 // Alcatel Lucent G-010S-A can operate at 2500base-X, but
72 // Huawei MA5671A can operate at 2500base-X, but report 1.2GBd
78 // Lantech 8330-262D-E can operate at 2500base-X, but
81 .part = "8330-262D-E",
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgt215.c4 * Permission is hereby granted, free of charge, to any person obtaining a
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 #define gt215_ram(p) container_of((p), struct gt215_ram, base)
39 struct ramfuc base; member
94 struct nvkm_ram base; member
120 hi--; in gt215_link_train_calc()
[all …]
/OK3568_Linux_fs/kernel/arch/mips/alchemy/common/
H A Dusb.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * area. Au1550 has OHCI on different base address. No need to handle
8 * Au1200: one register to control access and clocks to O/EHCI, UDC and OTG
20 #include <asm/mach-au1x00/au1000.h>
28 #define USBHEN_RD (1 << 4) /* OHCI reset-done indicator */
32 #define USBHEN_BE (1 << 0) /* OHCI Big-Endian */
43 #define USBCFG_FLA(x) (((x) & 0x3f) << 8) argument
74 #define USB_DWC_CTRL1_OTGD 0x04 /* set to DISable OTG */
75 #define USB_DWC_CTRL1_HSTRS 0x02 /* set to ENable EHCI */
76 #define USB_DWC_CTRL1_DCRS 0x01 /* set to ENable UDC */
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/oki-semi/pch_gbe/
H A Dpch_gbe_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define PHY_MAX_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
14 /* PHY 1000 MII Register/Bit Definitions */
21 #define PHY_LP_ABILITY 0x05 /* Link Partner Ability (Base Page) */
25 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Register */
26 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Register */
34 #define MII_CR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */
41 #define MII_CR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */
59 #define MII_SR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_object_blt.c1 // SPDX-License-Identifier: MIT
29 struct drm_i915_private *i915 = to_i915(obj->base.dev); in __perf_fill_blt()
34 ktime_t t[5]; in __perf_fill_blt() local
45 for (pass = 0; pass < ARRAY_SIZE(t); pass++) { in __perf_fill_blt()
46 struct intel_context *ce = engine->kernel_context; in __perf_fill_blt()
62 t[pass] = ktime_sub(t1, t0); in __perf_fill_blt()
68 sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL); in __perf_fill_blt()
70 engine->name, in __perf_fill_blt()
71 obj->base.size >> 10, in __perf_fill_blt()
72 div64_u64(mul_u32_u32(4 * obj->base.size, in __perf_fill_blt()
[all …]
/OK3568_Linux_fs/kernel/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-sgmii.c7 * Copyright (C) 2003-2018 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
35 #include <asm/octeon/cvmx-config.h>
37 #include <asm/octeon/cvmx-helper.h>
38 #include <asm/octeon/cvmx-helper-board.h>
40 #include <asm/octeon/cvmx-gmxx-defs.h>
41 #include <asm/octeon/cvmx-pcsx-defs.h>
42 #include <asm/octeon/cvmx-pcsxx-defs.h>
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/dsi/pll/
H A Ddsi_pll_14nm.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
13 * DSI PLL 14nm - clock diagram (eg: DSI0):
18 * +----+ | +----+
19 * dsi0vco_clk ---| n1 |--o--| /8 |-- dsi0pllbyte
20 * +----+ | +----+
22 * | +----+ |
23 * o---| /2 |--o--|\
24 * | +----+ | \ +----+
25 * | | |--| n2 |-- dsi0pll
[all …]

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