xref: /OK3568_Linux_fs/kernel/drivers/ide/qd65xx.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Copyright (C) 1996-2001  Linus Torvalds & author (see below)
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun /*
7*4882a593Smuzhiyun  *  Version 0.03	Cleaned auto-tune, added probe
8*4882a593Smuzhiyun  *  Version 0.04	Added second channel tuning
9*4882a593Smuzhiyun  *  Version 0.05	Enhanced tuning ; added qd6500 support
10*4882a593Smuzhiyun  *  Version 0.06	Added dos driver's list
11*4882a593Smuzhiyun  *  Version 0.07	Second channel bug fix
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * QDI QD6500/QD6580 EIDE controller fast support
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * To activate controller support, use "ide0=qd65xx"
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /*
19*4882a593Smuzhiyun  * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
20*4882a593Smuzhiyun  * Samuel Thibault <samuel.thibault@ens-lyon.org>
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <linux/module.h>
24*4882a593Smuzhiyun #include <linux/types.h>
25*4882a593Smuzhiyun #include <linux/kernel.h>
26*4882a593Smuzhiyun #include <linux/delay.h>
27*4882a593Smuzhiyun #include <linux/timer.h>
28*4882a593Smuzhiyun #include <linux/mm.h>
29*4882a593Smuzhiyun #include <linux/ioport.h>
30*4882a593Smuzhiyun #include <linux/blkdev.h>
31*4882a593Smuzhiyun #include <linux/ide.h>
32*4882a593Smuzhiyun #include <linux/init.h>
33*4882a593Smuzhiyun #include <asm/io.h>
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define DRV_NAME "qd65xx"
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #include "qd65xx.h"
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /*
40*4882a593Smuzhiyun  * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
41*4882a593Smuzhiyun  *            or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
42*4882a593Smuzhiyun  *	-- qd6500 is a single IDE interface
43*4882a593Smuzhiyun  *	-- qd6580 is a dual IDE interface
44*4882a593Smuzhiyun  *
45*4882a593Smuzhiyun  * More research on qd6580 being done by willmore@cig.mot.com (David)
46*4882a593Smuzhiyun  * More Information given by Petr Soucek (petr@ryston.cz)
47*4882a593Smuzhiyun  * http://www.ryston.cz/petr/vlb
48*4882a593Smuzhiyun  */
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun  * base: Timer1
52*4882a593Smuzhiyun  *
53*4882a593Smuzhiyun  *
54*4882a593Smuzhiyun  * base+0x01: Config (R/O)
55*4882a593Smuzhiyun  *
56*4882a593Smuzhiyun  * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
57*4882a593Smuzhiyun  * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
58*4882a593Smuzhiyun  * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
59*4882a593Smuzhiyun  * bit 3: qd6500: 1 = disabled, 0 = enabled
60*4882a593Smuzhiyun  *        qd6580: 1
61*4882a593Smuzhiyun  * upper nibble:
62*4882a593Smuzhiyun  *        qd6500: 1100
63*4882a593Smuzhiyun  *        qd6580: either 1010 or 0101
64*4882a593Smuzhiyun  *
65*4882a593Smuzhiyun  *
66*4882a593Smuzhiyun  * base+0x02: Timer2 (qd6580 only)
67*4882a593Smuzhiyun  *
68*4882a593Smuzhiyun  *
69*4882a593Smuzhiyun  * base+0x03: Control (qd6580 only)
70*4882a593Smuzhiyun  *
71*4882a593Smuzhiyun  * bits 0-3 must always be set 1
72*4882a593Smuzhiyun  * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
73*4882a593Smuzhiyun  * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
74*4882a593Smuzhiyun  *         0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
75*4882a593Smuzhiyun  *                                                   channel 1 for hdc & hdd
76*4882a593Smuzhiyun  * bit 1 : 1 = only disks on primary port
77*4882a593Smuzhiyun  *         0 = disks & ATAPI devices on primary port
78*4882a593Smuzhiyun  * bit 2-4 : always 0
79*4882a593Smuzhiyun  * bit 5 : status, but of what ?
80*4882a593Smuzhiyun  * bit 6 : always set 1 by dos driver
81*4882a593Smuzhiyun  * bit 7 : set 1 for non-ATAPI devices on primary port
82*4882a593Smuzhiyun  *	(maybe read-ahead and post-write buffer ?)
83*4882a593Smuzhiyun  */
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /*
88*4882a593Smuzhiyun  * qd65xx_select:
89*4882a593Smuzhiyun  *
90*4882a593Smuzhiyun  * This routine is invoked to prepare for access to a given drive.
91*4882a593Smuzhiyun  */
92*4882a593Smuzhiyun 
qd65xx_dev_select(ide_drive_t * drive)93*4882a593Smuzhiyun static void qd65xx_dev_select(ide_drive_t *drive)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun 	u8 index = ((	(QD_TIMREG(drive)) & 0x80 ) >> 7) |
96*4882a593Smuzhiyun 			(QD_TIMREG(drive) & 0x02);
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	if (timings[index] != QD_TIMING(drive))
99*4882a593Smuzhiyun 		outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	outb(drive->select | ATA_DEVICE_OBS, drive->hwif->io_ports.device_addr);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun /*
105*4882a593Smuzhiyun  * qd6500_compute_timing
106*4882a593Smuzhiyun  *
107*4882a593Smuzhiyun  * computes the timing value where
108*4882a593Smuzhiyun  *	lower nibble represents active time,   in count of VLB clocks
109*4882a593Smuzhiyun  *	upper nibble represents recovery time, in count of VLB clocks
110*4882a593Smuzhiyun  */
111*4882a593Smuzhiyun 
qd6500_compute_timing(ide_hwif_t * hwif,int active_time,int recovery_time)112*4882a593Smuzhiyun static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
115*4882a593Smuzhiyun 	u8 act_cyc, rec_cyc;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	if (clk <= 33) {
118*4882a593Smuzhiyun 		act_cyc =  9 - IDE_IN(active_time   * clk / 1000 + 1, 2,  9);
119*4882a593Smuzhiyun 		rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
120*4882a593Smuzhiyun 	} else {
121*4882a593Smuzhiyun 		act_cyc =  8 - IDE_IN(active_time   * clk / 1000 + 1, 1,  8);
122*4882a593Smuzhiyun 		rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
123*4882a593Smuzhiyun 	}
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	return (rec_cyc << 4) | 0x08 | act_cyc;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun /*
129*4882a593Smuzhiyun  * qd6580_compute_timing
130*4882a593Smuzhiyun  *
131*4882a593Smuzhiyun  * idem for qd6580
132*4882a593Smuzhiyun  */
133*4882a593Smuzhiyun 
qd6580_compute_timing(int active_time,int recovery_time)134*4882a593Smuzhiyun static u8 qd6580_compute_timing (int active_time, int recovery_time)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
137*4882a593Smuzhiyun 	u8 act_cyc, rec_cyc;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	act_cyc = 17 - IDE_IN(active_time   * clk / 1000 + 1, 2, 17);
140*4882a593Smuzhiyun 	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	return (rec_cyc << 4) | act_cyc;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun /*
146*4882a593Smuzhiyun  * qd_find_disk_type
147*4882a593Smuzhiyun  *
148*4882a593Smuzhiyun  * tries to find timing from dos driver's table
149*4882a593Smuzhiyun  */
150*4882a593Smuzhiyun 
qd_find_disk_type(ide_drive_t * drive,int * active_time,int * recovery_time)151*4882a593Smuzhiyun static int qd_find_disk_type (ide_drive_t *drive,
152*4882a593Smuzhiyun 		int *active_time, int *recovery_time)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun 	struct qd65xx_timing_s *p;
155*4882a593Smuzhiyun 	char *m = (char *)&drive->id[ATA_ID_PROD];
156*4882a593Smuzhiyun 	char model[ATA_ID_PROD_LEN];
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	if (*m == 0)
159*4882a593Smuzhiyun 		return 0;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	strncpy(model, m, ATA_ID_PROD_LEN);
162*4882a593Smuzhiyun 	ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
165*4882a593Smuzhiyun 		if (!strncmp(p->model, model+p->offset, 4)) {
166*4882a593Smuzhiyun 			printk(KERN_DEBUG "%s: listed !\n", drive->name);
167*4882a593Smuzhiyun 			*active_time = p->active;
168*4882a593Smuzhiyun 			*recovery_time = p->recovery;
169*4882a593Smuzhiyun 			return 1;
170*4882a593Smuzhiyun 		}
171*4882a593Smuzhiyun 	}
172*4882a593Smuzhiyun 	return 0;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun /*
176*4882a593Smuzhiyun  * qd_set_timing:
177*4882a593Smuzhiyun  *
178*4882a593Smuzhiyun  * records the timing
179*4882a593Smuzhiyun  */
180*4882a593Smuzhiyun 
qd_set_timing(ide_drive_t * drive,u8 timing)181*4882a593Smuzhiyun static void qd_set_timing (ide_drive_t *drive, u8 timing)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	unsigned long data = (unsigned long)ide_get_drivedata(drive);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	data &= 0xff00;
186*4882a593Smuzhiyun 	data |= timing;
187*4882a593Smuzhiyun 	ide_set_drivedata(drive, (void *)data);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun 
qd6500_set_pio_mode(ide_hwif_t * hwif,ide_drive_t * drive)192*4882a593Smuzhiyun static void qd6500_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun 	u16 *id = drive->id;
195*4882a593Smuzhiyun 	int active_time   = 175;
196*4882a593Smuzhiyun 	int recovery_time = 415; /* worst case values from the dos driver */
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	/* FIXME: use drive->pio_mode value */
199*4882a593Smuzhiyun 	if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
200*4882a593Smuzhiyun 	    (id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
201*4882a593Smuzhiyun 	    id[ATA_ID_EIDE_PIO] >= 240) {
202*4882a593Smuzhiyun 		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
203*4882a593Smuzhiyun 			id[ATA_ID_OLD_PIO_MODES] & 0xff);
204*4882a593Smuzhiyun 		active_time = 110;
205*4882a593Smuzhiyun 		recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120;
206*4882a593Smuzhiyun 	}
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	qd_set_timing(drive, qd6500_compute_timing(drive->hwif,
209*4882a593Smuzhiyun 				active_time, recovery_time));
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun 
qd6580_set_pio_mode(ide_hwif_t * hwif,ide_drive_t * drive)212*4882a593Smuzhiyun static void qd6580_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun 	const u8 pio = drive->pio_mode - XFER_PIO_0;
215*4882a593Smuzhiyun 	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
216*4882a593Smuzhiyun 	unsigned int cycle_time;
217*4882a593Smuzhiyun 	int active_time   = 175;
218*4882a593Smuzhiyun 	int recovery_time = 415; /* worst case values from the dos driver */
219*4882a593Smuzhiyun 	u8 base = (hwif->config_data & 0xff00) >> 8;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
222*4882a593Smuzhiyun 		cycle_time = ide_pio_cycle_time(drive, pio);
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 		switch (pio) {
225*4882a593Smuzhiyun 			case 0: break;
226*4882a593Smuzhiyun 			case 3:
227*4882a593Smuzhiyun 				if (cycle_time >= 110) {
228*4882a593Smuzhiyun 					active_time = 86;
229*4882a593Smuzhiyun 					recovery_time = cycle_time - 102;
230*4882a593Smuzhiyun 				} else
231*4882a593Smuzhiyun 					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
232*4882a593Smuzhiyun 				break;
233*4882a593Smuzhiyun 			case 4:
234*4882a593Smuzhiyun 				if (cycle_time >= 69) {
235*4882a593Smuzhiyun 					active_time = 70;
236*4882a593Smuzhiyun 					recovery_time = cycle_time - 61;
237*4882a593Smuzhiyun 				} else
238*4882a593Smuzhiyun 					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
239*4882a593Smuzhiyun 				break;
240*4882a593Smuzhiyun 			default:
241*4882a593Smuzhiyun 				if (cycle_time >= 180) {
242*4882a593Smuzhiyun 					active_time = 110;
243*4882a593Smuzhiyun 					recovery_time = cycle_time - 120;
244*4882a593Smuzhiyun 				} else {
245*4882a593Smuzhiyun 					active_time = t->active;
246*4882a593Smuzhiyun 					recovery_time = cycle_time - active_time;
247*4882a593Smuzhiyun 				}
248*4882a593Smuzhiyun 		}
249*4882a593Smuzhiyun 		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	if (!hwif->channel && drive->media != ide_disk) {
253*4882a593Smuzhiyun 		outb(0x5f, QD_CONTROL_PORT);
254*4882a593Smuzhiyun 		printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
255*4882a593Smuzhiyun 			"and post-write buffer on %s.\n",
256*4882a593Smuzhiyun 			drive->name, hwif->name);
257*4882a593Smuzhiyun 	}
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun /*
263*4882a593Smuzhiyun  * qd_testreg
264*4882a593Smuzhiyun  *
265*4882a593Smuzhiyun  * tests if the given port is a register
266*4882a593Smuzhiyun  */
267*4882a593Smuzhiyun 
qd_testreg(int port)268*4882a593Smuzhiyun static int __init qd_testreg(int port)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun 	unsigned long flags;
271*4882a593Smuzhiyun 	u8 savereg, readreg;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	local_irq_save(flags);
274*4882a593Smuzhiyun 	savereg = inb_p(port);
275*4882a593Smuzhiyun 	outb_p(QD_TESTVAL, port);	/* safe value */
276*4882a593Smuzhiyun 	readreg = inb_p(port);
277*4882a593Smuzhiyun 	outb(savereg, port);
278*4882a593Smuzhiyun 	local_irq_restore(flags);
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	if (savereg == QD_TESTVAL) {
281*4882a593Smuzhiyun 		printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
282*4882a593Smuzhiyun 		printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
283*4882a593Smuzhiyun 		printk(KERN_ERR "Assuming qd65xx is not present.\n");
284*4882a593Smuzhiyun 		return 1;
285*4882a593Smuzhiyun 	}
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	return (readreg != QD_TESTVAL);
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun 
qd6500_init_dev(ide_drive_t * drive)290*4882a593Smuzhiyun static void __init qd6500_init_dev(ide_drive_t *drive)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun 	ide_hwif_t *hwif = drive->hwif;
293*4882a593Smuzhiyun 	u8 base = (hwif->config_data & 0xff00) >> 8;
294*4882a593Smuzhiyun 	u8 config = QD_CONFIG(hwif);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	ide_set_drivedata(drive, (void *)QD6500_DEF_DATA);
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun 
qd6580_init_dev(ide_drive_t * drive)299*4882a593Smuzhiyun static void __init qd6580_init_dev(ide_drive_t *drive)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun 	ide_hwif_t *hwif = drive->hwif;
302*4882a593Smuzhiyun 	unsigned long t1, t2;
303*4882a593Smuzhiyun 	u8 base = (hwif->config_data & 0xff00) >> 8;
304*4882a593Smuzhiyun 	u8 config = QD_CONFIG(hwif);
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	if (hwif->host_flags & IDE_HFLAG_SINGLE) {
307*4882a593Smuzhiyun 		t1 = QD6580_DEF_DATA;
308*4882a593Smuzhiyun 		t2 = QD6580_DEF_DATA2;
309*4882a593Smuzhiyun 	} else
310*4882a593Smuzhiyun 		t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	ide_set_drivedata(drive, (void *)((drive->dn & 1) ? t2 : t1));
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun static const struct ide_tp_ops qd65xx_tp_ops = {
316*4882a593Smuzhiyun 	.exec_command		= ide_exec_command,
317*4882a593Smuzhiyun 	.read_status		= ide_read_status,
318*4882a593Smuzhiyun 	.read_altstatus		= ide_read_altstatus,
319*4882a593Smuzhiyun 	.write_devctl		= ide_write_devctl,
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	.dev_select		= qd65xx_dev_select,
322*4882a593Smuzhiyun 	.tf_load		= ide_tf_load,
323*4882a593Smuzhiyun 	.tf_read		= ide_tf_read,
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	.input_data		= ide_input_data,
326*4882a593Smuzhiyun 	.output_data		= ide_output_data,
327*4882a593Smuzhiyun };
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun static const struct ide_port_ops qd6500_port_ops = {
330*4882a593Smuzhiyun 	.init_dev		= qd6500_init_dev,
331*4882a593Smuzhiyun 	.set_pio_mode		= qd6500_set_pio_mode,
332*4882a593Smuzhiyun };
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun static const struct ide_port_ops qd6580_port_ops = {
335*4882a593Smuzhiyun 	.init_dev		= qd6580_init_dev,
336*4882a593Smuzhiyun 	.set_pio_mode		= qd6580_set_pio_mode,
337*4882a593Smuzhiyun };
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun static const struct ide_port_info qd65xx_port_info __initconst = {
340*4882a593Smuzhiyun 	.name			= DRV_NAME,
341*4882a593Smuzhiyun 	.tp_ops 		= &qd65xx_tp_ops,
342*4882a593Smuzhiyun 	.chipset		= ide_qd65xx,
343*4882a593Smuzhiyun 	.host_flags		= IDE_HFLAG_IO_32BIT |
344*4882a593Smuzhiyun 				  IDE_HFLAG_NO_DMA,
345*4882a593Smuzhiyun 	.pio_mask		= ATA_PIO4,
346*4882a593Smuzhiyun };
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun /*
349*4882a593Smuzhiyun  * qd_probe:
350*4882a593Smuzhiyun  *
351*4882a593Smuzhiyun  * looks at the specified baseport, and if qd found, registers & initialises it
352*4882a593Smuzhiyun  * return 1 if another qd may be probed
353*4882a593Smuzhiyun  */
354*4882a593Smuzhiyun 
qd_probe(int base)355*4882a593Smuzhiyun static int __init qd_probe(int base)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun 	int rc;
358*4882a593Smuzhiyun 	u8 config, unit, control;
359*4882a593Smuzhiyun 	struct ide_port_info d = qd65xx_port_info;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	config = inb(QD_CONFIG_PORT);
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
364*4882a593Smuzhiyun 		return -ENODEV;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	unit = ! (config & QD_CONFIG_IDE_BASEPORT);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	if (unit)
369*4882a593Smuzhiyun 		d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	switch (config & 0xf0) {
372*4882a593Smuzhiyun 	case QD_CONFIG_QD6500:
373*4882a593Smuzhiyun 		if (qd_testreg(base))
374*4882a593Smuzhiyun 			 return -ENODEV;	/* bad register */
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 		if (config & QD_CONFIG_DISABLED) {
377*4882a593Smuzhiyun 			printk(KERN_WARNING "qd6500 is disabled !\n");
378*4882a593Smuzhiyun 			return -ENODEV;
379*4882a593Smuzhiyun 		}
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 		printk(KERN_NOTICE "qd6500 at %#x\n", base);
382*4882a593Smuzhiyun 		printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
383*4882a593Smuzhiyun 			config, QD_ID3);
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 		d.port_ops = &qd6500_port_ops;
386*4882a593Smuzhiyun 		d.host_flags |= IDE_HFLAG_SINGLE;
387*4882a593Smuzhiyun 		break;
388*4882a593Smuzhiyun 	case QD_CONFIG_QD6580_A:
389*4882a593Smuzhiyun 	case QD_CONFIG_QD6580_B:
390*4882a593Smuzhiyun 		if (qd_testreg(base) || qd_testreg(base + 0x02))
391*4882a593Smuzhiyun 			return -ENODEV;	/* bad registers */
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 		control = inb(QD_CONTROL_PORT);
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 		printk(KERN_NOTICE "qd6580 at %#x\n", base);
396*4882a593Smuzhiyun 		printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
397*4882a593Smuzhiyun 			config, control, QD_ID3);
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 		outb(QD_DEF_CONTR, QD_CONTROL_PORT);
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 		d.port_ops = &qd6580_port_ops;
402*4882a593Smuzhiyun 		if (control & QD_CONTR_SEC_DISABLED)
403*4882a593Smuzhiyun 			d.host_flags |= IDE_HFLAG_SINGLE;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 		printk(KERN_INFO "qd6580: %s IDE board\n",
406*4882a593Smuzhiyun 			(control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
407*4882a593Smuzhiyun 		break;
408*4882a593Smuzhiyun 	default:
409*4882a593Smuzhiyun 		return -ENODEV;
410*4882a593Smuzhiyun 	}
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	rc = ide_legacy_device_add(&d, (base << 8) | config);
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	if (d.host_flags & IDE_HFLAG_SINGLE)
415*4882a593Smuzhiyun 		return (rc == 0) ? 1 : rc;
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	return rc;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun static bool probe_qd65xx;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun module_param_named(probe, probe_qd65xx, bool, 0);
423*4882a593Smuzhiyun MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
424*4882a593Smuzhiyun 
qd65xx_init(void)425*4882a593Smuzhiyun static int __init qd65xx_init(void)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun 	int rc1, rc2 = -ENODEV;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	if (probe_qd65xx == 0)
430*4882a593Smuzhiyun 		return -ENODEV;
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	rc1 = qd_probe(0x30);
433*4882a593Smuzhiyun 	if (rc1)
434*4882a593Smuzhiyun 		rc2 = qd_probe(0xb0);
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	if (rc1 < 0 && rc2 < 0)
437*4882a593Smuzhiyun 		return -ENODEV;
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	return 0;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun module_init(qd65xx_init);
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun MODULE_AUTHOR("Samuel Thibault");
445*4882a593Smuzhiyun MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
446*4882a593Smuzhiyun MODULE_LICENSE("GPL");
447