| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | keystone-k2l-netcp.dtsi | 18 queue-range = <0 0x2000>; 19 linkram0 = <0x100000 0x4000>; 20 linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */ 27 managed-queues = <0 0x2000>; 28 reg = <0x2a40000 0x20000>, 29 <0x2a06000 0x400>, 30 <0x2a02000 0x1000>, 31 <0x2a03000 0x1000>, 32 <0x23a80000 0x20000>, 33 <0x2a80000 0x20000>; [all …]
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| H A D | keystone-k2hk-netcp.dtsi | 18 queue-range = <0 0x4000>; 19 linkram0 = <0x100000 0x8000>; 20 linkram1 = <0x0 0x10000>; 27 managed-queues = <0 0x2000>; 28 reg = <0x2a40000 0x20000>, 29 <0x2a06000 0x400>, 30 <0x2a02000 0x1000>, 31 <0x2a03000 0x1000>, 32 <0x23a80000 0x20000>, 33 <0x2a80000 0x20000>; [all …]
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| H A D | keystone-k2e-netcp.dtsi | 18 queue-range = <0 0x2000>; 19 linkram0 = <0x100000 0x4000>; 20 linkram1 = <0 0x10000>; 27 managed-queues = <0 0x2000>; 28 reg = <0x2a40000 0x20000>, 29 <0x2a06000 0x400>, 30 <0x2a02000 0x1000>, 31 <0x2a03000 0x1000>, 32 <0x23a80000 0x20000>, 33 <0x2a80000 0x20000>; [all …]
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| H A D | keystone-k2g-netcp.dtsi | 20 queue-range = <0 0x80>; 21 linkram0 = <0x4020000 0x7ff>; 28 managed-queues = <0 0x80>; 29 reg = <0x4100000 0x800>, 30 <0x4040000 0x100>, 31 <0x4080000 0x800>, 32 <0x40c0000 0x800>; 40 qpend-0 { 42 interrupts =<0 308 0xf04 0 309 0xf04 0 310 0xf04 43 0 311 0xf04 0 312 0xf04 0 313 0xf04 [all …]
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| H A D | exynos5.dtsi | 19 reg = <0x10440000 0x1000>; 20 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, 21 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, 22 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, 23 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, 24 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, 25 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, 26 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, 27 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; 34 reg = <0x10481000 0x1000>, [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | keystone-k2e-netcp.dtsi | 15 queue-range = <0 0x2000>; 16 linkram0 = <0x100000 0x4000>; 17 linkram1 = <0 0x10000>; 24 managed-queues = <0 0x2000>; 25 reg = <0x2a40000 0x20000>, 26 <0x2a06000 0x400>, 27 <0x2a02000 0x1000>, 28 <0x2a03000 0x1000>, 29 <0x23a80000 0x20000>, 30 <0x2a80000 0x20000>; [all …]
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| H A D | keystone-k2l-netcp.dtsi | 15 queue-range = <0 0x2000>; 16 linkram0 = <0x100000 0x4000>; 17 linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */ 24 managed-queues = <0 0x2000>; 25 reg = <0x2a40000 0x20000>, 26 <0x2a06000 0x400>, 27 <0x2a02000 0x1000>, 28 <0x2a03000 0x1000>, 29 <0x23a80000 0x20000>, 30 <0x2a80000 0x20000>; [all …]
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| H A D | keystone-k2hk-netcp.dtsi | 15 queue-range = <0 0x4000>; 16 linkram0 = <0x100000 0x8000>; 17 linkram1 = <0x0 0x10000>; 24 managed-queues = <0 0x2000>; 25 reg = <0x2a40000 0x20000>, 26 <0x2a06000 0x400>, 27 <0x2a02000 0x1000>, 28 <0x2a03000 0x1000>, 29 <0x23a80000 0x20000>, 30 <0x2a80000 0x20000>; [all …]
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| H A D | keystone-k2g-netcp.dtsi | 13 power-domains = <&k2g_pds 0x0018>; 14 clocks = <&k2g_clks 0x0018 0>; 17 queue-range = <0 0x80>; 18 linkram0 = <0x4020000 0x7ff>; 26 managed-queues = <0 0x80>; 27 reg = <0x4100000 0x800>, 28 <0x4040000 0x100>, 29 <0x4080000 0x800>, 30 <0x40c0000 0x800>; 38 qpend-0 { [all …]
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| H A D | hip01.dtsi | 19 #address-cells = <0>; 21 reg = <0x1a001000 0x1000>, <0x1a000100 0x1000>; 26 #clock-cells = <0>; 36 ranges = <0 0x10000000 0x20000000>; 46 reg = <0x10001000 0x1000>; 50 interrupts = <0 32 4>; 56 reg = <0x10002000 0x1000>; 60 interrupts = <0 33 4>; 66 reg = <0x10003000 0x1000>; 70 interrupts = <0 34 4>; [all …]
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| H A D | arm-realview-pbx-a9.dts | 32 arm,hbi = <0x182>; 36 #size-cells = <0>; 49 CPU0: cpu@0 { 52 reg = <0x0>; 58 reg = <0x1>; 65 reg = <0x1f002000 0x1000>; 83 reg = <0x1f000000 0x100>; 88 reg = <0x1f000600 0x20>; 90 interrupts = <1 13 0xf04>; 95 reg = <0x1f000620 0x20>; [all …]
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| H A D | arm-realview-eb-mp.dtsi | 46 reg = <0x1f001000 0x1000>, 47 <0x1f000100 0x100>; 56 reg = <0x10041000 0x1000>, 57 <0x10040000 0x100>; 59 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; 64 reg = <0x1f002000 0x1000>; 66 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, 67 <0 30 IRQ_TYPE_LEVEL_HIGH>, 68 <0 31 IRQ_TYPE_LEVEL_HIGH>; 88 reg = <0x1f000000 0x100>; [all …]
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| H A D | ecx-2000.dts | 9 /memreserve/ 0x00000000 0x0001000; 19 #size-cells = <0>; 21 cpu@0 { 24 reg = <0>; 54 memory@0 { 57 reg = <0x00000000 0x00000000 0x00000000 0xff800000>; 63 reg = <0x00000002 0x00000000 0x00000003 0x00000000>; 67 ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; 70 compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, 71 <1 14 0xf08>, [all …]
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| H A D | vexpress-v2p-ca9.dts | 16 arm,hbi = <0x191>; 17 arm,vexpress,site = <0xf>; 36 #size-cells = <0>; 38 A9_0: cpu@0 { 41 reg = <0>; 69 reg = <0x60000000 0x40000000>; 77 /* Chipselect 3 is physically at 0x4c000000 */ 81 reg = <0x4c000000 0x00800000>; 88 reg = <0x10020000 0x1000>; 90 interrupts = <0 44 4>; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/soc/ti/ |
| H A D | keystone-navigator-qmss.txt | 27 external link ram entries. If the address is specified as "0" 83 0 : None, i.e interrupt on list full only 123 queue-range = <0 0x4000>; 124 linkram0 = <0x100000 0x8000>; 125 linkram1 = <0x0 0x10000>; 132 managed-queues = <0 0x2000>; 133 reg = <0x2a40000 0x20000>, 134 <0x2a06000 0x400>, 135 <0x2a02000 0x1000>, 136 <0x2a03000 0x1000>, [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/sprd/ |
| H A D | sharkl64.dtsi | 28 reg = <0 0x70000000 0 0x100>; 29 interrupts = <0 2 0xf04>; 36 reg = <0 0x70100000 0 0x100>; 37 interrupts = <0 3 0xf04>; 44 reg = <0 0x70200000 0 0x100>; 45 interrupts = <0 4 0xf04>; 52 reg = <0 0x70300000 0 0x100>; 53 interrupts = <0 5 0xf04>; 62 #clock-cells = <0>;
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| /OK3568_Linux_fs/kernel/sound/pci/hda/ |
| H A D | ca0132_regs.h | 12 #define DSP_CHIP_OFFSET 0x100000 13 #define DSP_DBGCNTL_MODULE_OFFSET 0xE30 17 #define DSP_DBGCNTL_EXEC_LOBIT 0x0 18 #define DSP_DBGCNTL_EXEC_HIBIT 0x3 19 #define DSP_DBGCNTL_EXEC_MASK 0xF 21 #define DSP_DBGCNTL_SS_LOBIT 0x4 22 #define DSP_DBGCNTL_SS_HIBIT 0x7 23 #define DSP_DBGCNTL_SS_MASK 0xF0 25 #define DSP_DBGCNTL_STATE_LOBIT 0xA 26 #define DSP_DBGCNTL_STATE_HIBIT 0xD [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | arm,gic.yaml | 59 enum: [ 0, 1 ] 66 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI 70 SPI interrupts are in the range [0-987]. PPI interrupts are in the 71 range [0-15]. 74 bits[3:0] trigger type and level flags. 142 "^v2m@[0-9a-f]+$": 189 reg = <0xfff11000 0x1000>, 190 <0xfff10100 0x100>; 199 reg = <0x2c001000 0x1000>, 200 <0x2c002000 0x2000>, [all …]
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| /OK3568_Linux_fs/kernel/include/linux/amba/ |
| H A D | sp810.h | 18 #define SCCTRL 0x000 19 #define SCSYSSTAT 0x004 20 #define SCIMCTRL 0x008 21 #define SCIMSTAT 0x00C 22 #define SCXTALCTRL 0x010 23 #define SCPLLCTRL 0x014 24 #define SCPLLFCTRL 0x018 25 #define SCPERCTRL0 0x01C 26 #define SCPERCTRL1 0x020 27 #define SCPEREN 0x024 [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-highbank/ |
| H A D | sysregs.h | 16 #define HB_SREG_A9_PWR_REQ 0xf00 17 #define HB_SREG_A9_BOOT_STAT 0xf04 18 #define HB_SREG_A9_BOOT_DATA 0xf08 20 #define HB_PWR_SUSPEND 0 25 #define SREG_CPU_PWR_CTRL(c) (0x200 + ((c) * 4)) 29 int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); in highbank_set_core_pwr() 38 int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); in highbank_clear_core_pwr() 42 writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu)); in highbank_clear_core_pwr() 71 writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ); in highbank_clear_pwr_request()
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/ |
| H A D | phydm_regdefine11ac.h | 25 #define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 26 #define ODM_REG_BB_RX_PATH_11AC 0x808 27 #define ODM_REG_BB_TX_PATH_11AC 0x80c 28 #define ODM_REG_BB_ATC_11AC 0x860 29 #define ODM_REG_EDCCA_POWER_CAL 0x8dc 30 #define ODM_REG_DBG_RPT_11AC 0x8fc 32 #define ODM_REG_EDCCA_DOWN_OPT 0x900 33 #define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 34 #define odm_adc_trigger_jaguar2 0x95C /*ADC sample mode*/ 35 #define ODM_REG_OFDM_FA_RST_11AC 0x9A4 [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/ |
| H A D | phydm_regdefine11ac.h | 30 #define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 31 #define ODM_REG_BB_RX_PATH_11AC 0x808 32 #define ODM_REG_BB_TX_PATH_11AC 0x80c 33 #define ODM_REG_BB_ATC_11AC 0x860 34 #define ODM_REG_EDCCA_POWER_CAL 0x8dc 35 #define ODM_REG_DBG_RPT_11AC 0x8fc 37 #define ODM_REG_EDCCA_DOWN_OPT 0x900 38 #define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 39 #define ODM_ADC_TRIGGER_Jaguar2 0x95C /*ADC sample mode*/ 40 #define ODM_REG_OFDM_FA_RST_11AC 0x9A4 [all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/ |
| H A D | phydm_regdefine11ac.h | 35 #define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 36 #define ODM_REG_BB_RX_PATH_11AC 0x808 37 #define ODM_REG_BB_TX_PATH_11AC 0x80c 38 #define ODM_REG_BB_ATC_11AC 0x860 39 #define ODM_REG_EDCCA_POWER_CAL 0x8dc 40 #define ODM_REG_DBG_RPT_11AC 0x8fc 42 #define ODM_REG_EDCCA_DOWN_OPT 0x900 43 #define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 44 #define odm_adc_trigger_jaguar2 0x95C /*@ADC sample mode*/ 45 #define ODM_REG_OFDM_FA_RST_11AC 0x9A4 [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/phydm/ |
| H A D | phydm_regdefine11ac.h | 35 #define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 36 #define ODM_REG_BB_RX_PATH_11AC 0x808 37 #define ODM_REG_BB_TX_PATH_11AC 0x80c 38 #define ODM_REG_BB_ATC_11AC 0x860 39 #define ODM_REG_EDCCA_POWER_CAL 0x8dc 40 #define ODM_REG_DBG_RPT_11AC 0x8fc 42 #define ODM_REG_EDCCA_DOWN_OPT 0x900 43 #define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 44 #define odm_adc_trigger_jaguar2 0x95C /*@ADC sample mode*/ 45 #define ODM_REG_OFDM_FA_RST_11AC 0x9A4 [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/phydm/ |
| H A D | phydm_regdefine11ac.h | 35 #define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 36 #define ODM_REG_BB_RX_PATH_11AC 0x808 37 #define ODM_REG_BB_TX_PATH_11AC 0x80c 38 #define ODM_REG_BB_ATC_11AC 0x860 39 #define ODM_REG_EDCCA_POWER_CAL 0x8dc 40 #define ODM_REG_DBG_RPT_11AC 0x8fc 42 #define ODM_REG_EDCCA_DOWN_OPT 0x900 43 #define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 44 #define odm_adc_trigger_jaguar2 0x95C /*@ADC sample mode*/ 45 #define ODM_REG_OFDM_FA_RST_11AC 0x9A4 [all …]
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