1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * ARM PrimeXsys System Controller SP810 header file 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2009 ST Microelectronics 5*4882a593Smuzhiyun * Viresh Kumar <vireshk@kernel.org> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 8*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any 9*4882a593Smuzhiyun * warranty of any kind, whether express or implied. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef __AMBA_SP810_H 13*4882a593Smuzhiyun #define __AMBA_SP810_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <linux/io.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* sysctl registers offset */ 18*4882a593Smuzhiyun #define SCCTRL 0x000 19*4882a593Smuzhiyun #define SCSYSSTAT 0x004 20*4882a593Smuzhiyun #define SCIMCTRL 0x008 21*4882a593Smuzhiyun #define SCIMSTAT 0x00C 22*4882a593Smuzhiyun #define SCXTALCTRL 0x010 23*4882a593Smuzhiyun #define SCPLLCTRL 0x014 24*4882a593Smuzhiyun #define SCPLLFCTRL 0x018 25*4882a593Smuzhiyun #define SCPERCTRL0 0x01C 26*4882a593Smuzhiyun #define SCPERCTRL1 0x020 27*4882a593Smuzhiyun #define SCPEREN 0x024 28*4882a593Smuzhiyun #define SCPERDIS 0x028 29*4882a593Smuzhiyun #define SCPERCLKEN 0x02C 30*4882a593Smuzhiyun #define SCPERSTAT 0x030 31*4882a593Smuzhiyun #define SCSYSID0 0xEE0 32*4882a593Smuzhiyun #define SCSYSID1 0xEE4 33*4882a593Smuzhiyun #define SCSYSID2 0xEE8 34*4882a593Smuzhiyun #define SCSYSID3 0xEEC 35*4882a593Smuzhiyun #define SCITCR 0xF00 36*4882a593Smuzhiyun #define SCITIR0 0xF04 37*4882a593Smuzhiyun #define SCITIR1 0xF08 38*4882a593Smuzhiyun #define SCITOR 0xF0C 39*4882a593Smuzhiyun #define SCCNTCTRL 0xF10 40*4882a593Smuzhiyun #define SCCNTDATA 0xF14 41*4882a593Smuzhiyun #define SCCNTSTEP 0xF18 42*4882a593Smuzhiyun #define SCPERIPHID0 0xFE0 43*4882a593Smuzhiyun #define SCPERIPHID1 0xFE4 44*4882a593Smuzhiyun #define SCPERIPHID2 0xFE8 45*4882a593Smuzhiyun #define SCPERIPHID3 0xFEC 46*4882a593Smuzhiyun #define SCPCELLID0 0xFF0 47*4882a593Smuzhiyun #define SCPCELLID1 0xFF4 48*4882a593Smuzhiyun #define SCPCELLID2 0xFF8 49*4882a593Smuzhiyun #define SCPCELLID3 0xFFC 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define SCCTRL_TIMERENnSEL_SHIFT(n) (15 + ((n) * 2)) 52*4882a593Smuzhiyun sysctl_soft_reset(void __iomem * base)53*4882a593Smuzhiyunstatic inline void sysctl_soft_reset(void __iomem *base) 54*4882a593Smuzhiyun { 55*4882a593Smuzhiyun /* switch to slow mode */ 56*4882a593Smuzhiyun writel(0x2, base + SCCTRL); 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* writing any value to SCSYSSTAT reg will reset system */ 59*4882a593Smuzhiyun writel(0, base + SCSYSSTAT); 60*4882a593Smuzhiyun } 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #endif /* __AMBA_SP810_H */ 63