Searched +full:0 +full:xe450 (Results 1 – 10 of 10) sorted by relevance
32 POWER_SUPPLY_TYPE_UNKNOWN = 0,90 * 0: from phy; 1: from grf373 chg_type == POWER_SUPPLY_TYPE_USB_CDP) ? 1 : 0; in rockchip_u2phy_vbus_detect()414 if (ret < 0) { in rockchip_usb2phy_reset()422 if (ret < 0) { in rockchip_usb2phy_reset()430 return 0; in rockchip_usb2phy_reset()454 return 0; in rockchip_usb2phy_init()475 return 0; in rockchip_usb2phy_exit()493 return 0; in rockchip_usb2phy_power_on()511 return 0; in rockchip_usb2phy_power_off()[all …]
7 title: Rockchip USB2.0 phy with inno IP block37 const: 040 const: 091 const: 0115 const: 0196 reg = <0xe450 0x10>;200 #clock-cells = <0>;201 #phy-cells = <0>;204 #phy-cells = <0>;205 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;[all …]
3 * Rockchip USB2.0 PHY with Innosilicon IP block driver41 #define FILTER_COUNTER 0xF424052 PHY_STATE_HS_ONLINE = 0,72 USB_CHG_STATE_UNDEFINED = 0,152 * 0: from phy; 1: from grf307 * struct rockchip_usb2phy - usb2.0 phy driver data.440 return 0; in rockchip_usb2phy_reset()454 return 0; in rockchip_usb2phy_reset()481 return 0; in rockchip_usb2phy_clk480m_prepare()540 init.flags = 0; in rockchip_usb2phy_clk480m_register()[all …]
42 #size-cells = <0>;70 cpu_l0: cpu@0 {73 reg = <0x0 0x0>;82 reg = <0x0 0x1>;90 reg = <0x0 0x2>;98 reg = <0x0 0x3>;106 reg = <0x0 0x100>;115 reg = <0x0 0x101>;164 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,165 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,[all …]
56 #size-cells = <0>;84 cpu_l0: cpu@0 {87 reg = <0x0 0x0>;99 reg = <0x0 0x1>;111 reg = <0x0 0x2>;123 reg = <0x0 0x3>;135 reg = <0x0 0x100>;147 reg = <0x0 0x101>;162 arm,psci-suspend-param = <0x0010000>;171 arm,psci-suspend-param = <0x1010000>;[all …]