Lines Matching +full:0 +full:xe450

7 title: Rockchip USB2.0 phy with inno IP block
37     const: 0
40     const: 0
91         const: 0
115         const: 0
196       reg = <0xe450 0x10>;
200       #clock-cells = <0>;
201       #phy-cells = <0>;
204         #phy-cells = <0>;
205         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
210         #phy-cells = <0>;
211         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
212                      <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
213                      <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;