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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpio/
H A Dfujitsu,mb86s70-gpio.txt11 - bit 0 specifies polarity (0 for normal, 1 for inverted).
16 reg = <0 0x31000000 0x10000>;
19 clocks = <&clk 0 2 1>;
/OK3568_Linux_fs/u-boot/include/configs/
H A Dpeach-pit.h13 "bootm_size=0x10000000\0" \
14 "kernel_addr_r=0x22000000\0" \
15 "fdt_addr_r=0x23000000\0" \
16 "ramdisk_addr_r=0x23300000\0" \
17 "scriptaddr=0x30000000\0" \
18 "pxefile_addr_r=0x31000000\0"
24 #define CONFIG_SYS_SDRAM_BASE 0x20000000
25 #define CONFIG_SYS_TEXT_BASE 0x23E00000
26 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
30 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
H A Dpeach-pi.h13 "bootm_size=0x10000000\0" \
14 "kernel_addr_r=0x22000000\0" \
15 "fdt_addr_r=0x23000000\0" \
16 "ramdisk_addr_r=0x23300000\0" \
17 "scriptaddr=0x30000000\0" \
18 "pxefile_addr_r=0x31000000\0"
24 #define CONFIG_SYS_SDRAM_BASE 0x20000000
25 #define CONFIG_SYS_TEXT_BASE 0x23E00000
26 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
30 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
/OK3568_Linux_fs/kernel/arch/arm/mach-lpc32xx/
H A Dphy3250.c47 .slave_channels = &pl08x_slave_channels[0],
64 OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd),
65 OF_DEV_AUXDATA("nxp,lpc3220-slc", 0x20020000, "20020000.flash",
67 OF_DEV_AUXDATA("nxp,lpc3220-mlc", 0x200a8000, "200a8000.flash",
88 .atag_offset = 0x100,
H A Dlpc32xx.h17 * AHB 0 physical base addresses
19 #define LPC32XX_SLC_BASE 0x20020000
20 #define LPC32XX_SSP0_BASE 0x20084000
21 #define LPC32XX_SPI1_BASE 0x20088000
22 #define LPC32XX_SSP1_BASE 0x2008C000
23 #define LPC32XX_SPI2_BASE 0x20090000
24 #define LPC32XX_I2S0_BASE 0x20094000
25 #define LPC32XX_SD_BASE 0x20098000
26 #define LPC32XX_I2S1_BASE 0x2009C000
27 #define LPC32XX_MLC_BASE 0x200A8000
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-lpc32xx/
H A Dcpu.h13 #define SLC_NAND_BASE 0x20020000 /* SLC NAND Flash registers base */
14 #define SSP0_BASE 0x20084000 /* SSP0 registers base */
15 #define SD_CARD_BASE 0x20098000 /* SD card interface registers base */
16 #define MLC_NAND_BASE 0x200A8000 /* MLC NAND Flash registers base */
17 #define DMA_BASE 0x31000000 /* DMA controller registers base */
18 #define USB_BASE 0x31020000 /* USB registers base */
19 #define LCD_BASE 0x31040000 /* LCD registers base */
20 #define ETHERNET_BASE 0x31060000 /* Ethernet registers base */
21 #define EMC_BASE 0x31080000 /* EMC configuration registers base */
24 #define CLK_PM_BASE 0x40004000 /* System control registers base */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Darasan,sdhci.yaml129 enum: [0, 1]
150 enum: [0, 2]
151 default: 0
172 reg = <0xe0100000 0x1000>;
176 interrupts = <0 24 4>;
182 reg = <0xe2800000 0x1000>;
186 interrupts = <0 24 4>;
197 reg = <0xfe330000 0x10000>;
207 #clock-cells = <0>;
214 interrupts = <0 48 4>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/include/asm/
H A Dinsn.h22 * 0 0 - - Unallocated
23 * 1 0 0 - Data processing, immediate
24 * 1 0 1 - Branch, exception generation and system instructions
25 * - 1 - 0 Loads and stores
26 * - 1 0 1 Data processing - register
27 * 0 1 1 1 Data processing - SIMD and floating point
42 AARCH64_INSN_HINT_NOP = 0x0 << 5,
43 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
44 AARCH64_INSN_HINT_WFE = 0x2 << 5,
45 AARCH64_INSN_HINT_WFI = 0x3 << 5,
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dlpc32xx.dtsi20 #size-cells = <0>;
22 cpu@0 {
25 reg = <0x0>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
49 ranges = <0x00000000 0x00000000 0x10000000>,
50 <0x20000000 0x20000000 0x30000000>,
51 <0xe0000000 0xe0000000 0x04000000>;
55 reg = <0x08000000 0x20000>;
59 ranges = <0x00000000 0x08000000 0x20000>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx7/
H A Dimx-regs.h12 #define ROM_SW_INFO_ADDR 0x000001E8
13 #define ROMCP_ARB_BASE_ADDR 0x00000000
14 #define ROMCP_ARB_END_ADDR 0x00017FFF
16 #define CAAM_ARB_BASE_ADDR 0x00100000
17 #define CAAM_ARB_END_ADDR 0x00107FFF
18 #define GIC400_ARB_BASE_ADDR 0x31000000
19 #define GIC400_ARB_END_ADDR 0x31007FFF
20 #define APBH_DMA_ARB_BASE_ADDR 0x33000000
21 #define APBH_DMA_ARB_END_ADDR 0x33007FFF
22 #define M4_BOOTROM_BASE_ADDR 0x00180000
[all …]
/OK3568_Linux_fs/kernel/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/OK3568_Linux_fs/kernel/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dimx8mq.dtsi46 #clock-cells = <0>;
53 #clock-cells = <0>;
60 #clock-cells = <0>;
67 #clock-cells = <0>;
74 #clock-cells = <0>;
81 #clock-cells = <0>;
88 #clock-cells = <0>;
95 #size-cells = <0>;
97 A53_0: cpu@0 {
100 reg = <0x0>;
[all …]
/OK3568_Linux_fs/kernel/drivers/media/i2c/s5c73m3/
H A Ds5c73m3-core.c127 u8 buf[4] = { addr >> 8, addr & 0xff, data >> 8, data & 0xff }; in s5c73m3_i2c_write()
131 v4l_dbg(4, s5c73m3_dbg, client, "%s: addr 0x%04x, data 0x%04x\n", in s5c73m3_i2c_write()
135 return 0; in s5c73m3_i2c_write()
137 return ret < 0 ? ret : -EREMOTEIO; in s5c73m3_i2c_write()
143 u8 rbuf[2], wbuf[2] = { addr >> 8, addr & 0xff }; in s5c73m3_i2c_read()
147 .flags = 0, in s5c73m3_i2c_read()
165 "%s: addr: 0x%04x, data: 0x%04x\n", in s5c73m3_i2c_read()
167 return 0; in s5c73m3_i2c_read()
172 return ret >= 0 ? -EREMOTEIO : ret; in s5c73m3_i2c_read()
180 if ((addr ^ state->i2c_write_address) & 0xffff0000) { in s5c73m3_write()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_hsi.h17 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e
23 #define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF
24 #define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 0
25 #define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000
31 #define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF
32 #define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 0
33 #define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000
42 #define PIN_CFG_NA 0x00000000
43 #define PIN_CFG_GPIO0_P0 0x00000001
44 #define PIN_CFG_GPIO1_P0 0x00000002
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/qlogic/qed/
H A Dqed_hsi.h130 #define CORE_PWM_PROD_UPDATE_DATA_AGG_CMD_MASK 0x3
131 #define CORE_PWM_PROD_UPDATE_DATA_AGG_CMD_SHIFT 0
132 #define CORE_PWM_PROD_UPDATE_DATA_RESERVED1_MASK 0x3F /* Set 0 */
162 #define CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG_MASK 0x3
163 #define CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG_SHIFT 0
164 #define CORE_RX_ACTION_ON_ERROR_NO_BUFF_MASK 0x3
166 #define CORE_RX_ACTION_ON_ERROR_RESERVED_MASK 0xF
285 #define CORE_TX_BD_DATA_FORCE_VLAN_MODE_MASK 0x1
286 #define CORE_TX_BD_DATA_FORCE_VLAN_MODE_SHIFT 0
287 #define CORE_TX_BD_DATA_VLAN_INSERTION_MASK 0x1
[all …]