1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2013 Samsung Electronics 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __CONFIG_PEACH_PIT_H 10*4882a593Smuzhiyun #define __CONFIG_PEACH_PIT_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define MEM_LAYOUT_ENV_SETTINGS \ 13*4882a593Smuzhiyun "bootm_size=0x10000000\0" \ 14*4882a593Smuzhiyun "kernel_addr_r=0x22000000\0" \ 15*4882a593Smuzhiyun "fdt_addr_r=0x23000000\0" \ 16*4882a593Smuzhiyun "ramdisk_addr_r=0x23300000\0" \ 17*4882a593Smuzhiyun "scriptaddr=0x30000000\0" \ 18*4882a593Smuzhiyun "pxefile_addr_r=0x31000000\0" 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include <configs/exynos5420-common.h> 21*4882a593Smuzhiyun #include <configs/exynos5-dt-common.h> 22*4882a593Smuzhiyun #include <configs/exynos5-common.h> 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE 0x20000000 25*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x23E00000 26*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* select serial console configuration */ 29*4882a593Smuzhiyun #define CONFIG_SERIAL3 /* use SERIAL 3 */ 30*4882a593Smuzhiyun #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* DRAM Memory Banks */ 33*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 4 34*4882a593Smuzhiyun #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #endif /* __CONFIG_PEACH_PIT_H */ 37