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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dtegra124-nyan-blaze-emc.dtsi78 nvidia,emc-auto-cal-config = <0xa1430000>;
79 nvidia,emc-auto-cal-config2 = <0x00000000>;
80 nvidia,emc-auto-cal-config3 = <0x00000000>;
81 nvidia,emc-auto-cal-interval = <0x001fffff>;
82 nvidia,emc-bgbias-ctl0 = <0x00000008>;
83 nvidia,emc-cfg = <0x73240000>;
84 nvidia,emc-cfg-2 = <0x000008c5>;
85 nvidia,emc-ctt-term-ctrl = <0x00000802>;
86 nvidia,emc-mode-1 = <0x80100003>;
87 nvidia,emc-mode-2 = <0x80200008>;
[all …]
H A Dtegra124-nyan-big-emc.dtsi229 nvidia,emc-auto-cal-config = <0xa1430000>;
230 nvidia,emc-auto-cal-config2 = <0x00000000>;
231 nvidia,emc-auto-cal-config3 = <0x00000000>;
232 nvidia,emc-auto-cal-interval = <0x001fffff>;
233 nvidia,emc-bgbias-ctl0 = <0x00000008>;
234 nvidia,emc-cfg = <0x73240000>;
235 nvidia,emc-cfg-2 = <0x000008c5>;
236 nvidia,emc-ctt-term-ctrl = <0x00000802>;
237 nvidia,emc-mode-1 = <0x80100003>;
238 nvidia,emc-mode-2 = <0x80200008>;
[all …]
H A Dlpc3250-phy3250.dts18 reg = <0x80000000 0x4000000>;
25 gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */
30 gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */
51 gpio = <&gpio 5 4 0>;
61 gpio = <&gpio 5 0 0>;
71 gpio = <&gpio 5 5 0>;
84 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
94 reg = <0x18>;
95 power-gpio = <&gpio 3 10 0>;
96 reset-gpio = <&gpio 3 2 0>;
[all …]
H A Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
3 reg = <0x4a000000 0x800>,
4 <0x4a000800 0x800>,
5 <0x4a001000 0x1000>;
9 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
10 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
11 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
13 segment@0 { /* 0x4a000000 */
17 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
18 <0x00000800 0x00000800 0x000800>, /* ap 1 */
[all …]
H A Domap5-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
3 reg = <0x4a000000 0x800>,
4 <0x4a000800 0x800>,
5 <0x4a001000 0x1000>;
9 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
10 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
11 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
12 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
13 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
14 <0x00280000 0x4a280000 0x080000>, /* segment 5 */
[all …]
H A Domap4-l4.dtsi2 &l4_cfg { /* 0x4a000000 */
4 reg = <0x4a000000 0x800>,
5 <0x4a000800 0x800>,
6 <0x4a001000 0x1000>;
10 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
11 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
12 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
13 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
14 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
15 <0x00280000 0x4a280000 0x080000>, /* segment 5 */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra124-emc.yaml38 "^emc-timings-[0-9]+$":
48 "^timing-[0-9]+$":
79 minimum: 0
142 minimum: 0
340 reg = <0x70019000 0x1000>;
352 reg = <0x7001b000 0x1000>;
358 emc-timings-0 {
361 timing-0 {
364 nvidia,emc-auto-cal-config = <0xa1430000>;
365 nvidia,emc-auto-cal-config2 = <0x00000000>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/
H A Dlpc32xx-mlc.txt28 reg = <0x200A8000 0x11000>;
29 interrupts = <11 0>;
44 reg = <0x00000000 0x00064000>;
H A Dlpc32xx-slc.txt29 reg = <0x20020000 0x1000>;
46 reg = <0x00000000 0x00064000>;
/OK3568_Linux_fs/u-boot/arch/m68k/include/asm/
H A Dimmap_520x.h13 #define MMAP_SCM1 (CONFIG_SYS_MBAR + 0x00000000)
14 #define MMAP_XBS (CONFIG_SYS_MBAR + 0x00004000)
15 #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00008000)
16 #define MMAP_FEC0 (CONFIG_SYS_MBAR + 0x00030000)
17 #define MMAP_SCM2 (CONFIG_SYS_MBAR + 0x00040000)
18 #define MMAP_EDMA (CONFIG_SYS_MBAR + 0x00044000)
19 #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00048000)
20 #define MMAP_INTCACK (CONFIG_SYS_MBAR + 0x00054000)
21 #define MMAP_I2C (CONFIG_SYS_MBAR + 0x00058000)
22 #define MMAP_QSPI (CONFIG_SYS_MBAR + 0x0005C000)
[all …]
H A Dimmap_5227x.h14 #define MMAP_SCM1 (CONFIG_SYS_MBAR + 0x00000000)
15 #define MMAP_XBS (CONFIG_SYS_MBAR + 0x00004000)
16 #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00008000)
17 #define MMAP_CAN (CONFIG_SYS_MBAR + 0x00020000)
18 #define MMAP_RTC (CONFIG_SYS_MBAR + 0x0003C000)
19 #define MMAP_SCM2 (CONFIG_SYS_MBAR + 0x00040010)
20 #define MMAP_SCM3 (CONFIG_SYS_MBAR + 0x00040070)
21 #define MMAP_EDMA (CONFIG_SYS_MBAR + 0x00044000)
22 #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00048000)
23 #define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x0004C000)
[all …]
H A Dimmap_5301x.h13 #define MMAP_SCM1 (CONFIG_SYS_MBAR + 0x00000000)
14 #define MMAP_XBS (CONFIG_SYS_MBAR + 0x00004000)
15 #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00008000)
16 #define MMAP_MPU (CONFIG_SYS_MBAR + 0x00014000)
17 #define MMAP_FEC0 (CONFIG_SYS_MBAR + 0x00030000)
18 #define MMAP_FEC1 (CONFIG_SYS_MBAR + 0x00034000)
19 #define MMAP_SCM2 (CONFIG_SYS_MBAR + 0x00040000)
20 #define MMAP_EDMA (CONFIG_SYS_MBAR + 0x00044000)
21 #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00048000)
22 #define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x0004C000)
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dimx-regs.h12 #define IRAM_BASE_ADDR 0x3E800000 /* internal ram */
13 #define IRAM_SIZE 0x00400000 /* 4MB */
15 #define AIPS0_BASE_ADDR (0x40000000UL)
16 #define AIPS1_BASE_ADDR (0x40080000UL)
18 /* AIPS 0 */
19 #define AXBS_BASE_ADDR (AIPS0_BASE_ADDR + 0x00000000)
20 #define CSE3_BASE_ADDR (AIPS0_BASE_ADDR + 0x00001000)
21 #define EDMA_BASE_ADDR (AIPS0_BASE_ADDR + 0x00002000)
22 #define XRDC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00004000)
23 #define SWT0_BASE_ADDR (AIPS0_BASE_ADDR + 0x0000A000)
[all …]
/OK3568_Linux_fs/kernel/drivers/mtd/parsers/
H A Dsharpslpart.c43 #define BLOCK_IS_RESERVED 0xffff
49 #define SHARPSL_PARTINFO1_LADDR 0x00060000
50 #define SHARPSL_PARTINFO2_LADDR 0x00064000
52 #define BOOT_MAGIC 0x424f4f54
53 #define FSRO_MAGIC 0x4653524f
54 #define FSRW_MAGIC 0x46535257
72 u8 freebytes = 0; in sharpsl_nand_check_ooblayout()
73 int section = 0; in sharpsl_nand_check_ooblayout()
91 if (freebytes == 0xff) in sharpsl_nand_check_ooblayout()
92 return 0; in sharpsl_nand_check_ooblayout()
[all …]
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu541.c92 0x0a000010, 0x00064000, 0x14000020, 0x000c8000,
93 0x28000040, 0x00194000, 0x50800080, 0x0032c000,
94 0xa1000100, 0x00658000, 0x42800200, 0x00cb0001,
95 0x85000400, 0x01964002, 0x0a000800, 0x032c8005,
96 0x14001000, 0x0659400a, 0x28802000, 0x0cb2c014,
97 0x51004000, 0x1965c028, 0xa2808000, 0x32cbc050,
98 0x4500ffff, 0x659780a1, 0x8a81fffe, 0xCC000142,
99 0xFF83FFFF, 0x000001FF,
102 static RK_U32 dump_l1_reg = 0;
103 static RK_U32 dump_l2_reg = 0;
[all …]
H A Dhal_h264e_vepu580.c44 #define DUMP_REG 0
134 0x0a000010, 0x00064000, 0x14000020, 0x000c8000,
135 0x28000040, 0x00194000, 0x50800080, 0x0032c000,
136 0xa1000100, 0x00658000, 0x42800200, 0x00cb0001,
137 0x85000400, 0x01964002, 0x0a000800, 0x032c8005,
138 0x14001000, 0x0659400a, 0x28802000, 0x0cb2c014,
139 0x51004000, 0x1965c028, 0xa2808000, 0x32cbc050,
140 0x4500ffff, 0x659780a1, 0x8a81fffe, 0xCC000142,
141 0xFF83FFFF, 0x000001FF,
144 static RK_U32 dump_l1_reg = 0;
[all …]