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Searched defs:reg (Results 1 – 25 of 33) sorted by relevance

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/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu2.c37 static MPP_RET jpegd_regs_init(JpegRegSet *reg) in jpegd_regs_init()
74 JpegRegSet *reg = &(info->regs); in jpegd_write_code_word_number() local
192 JpegRegSet *reg = &(info->regs); in jpegd_set_chroma_table_id() local
241 JpegRegSet *reg = &(info->regs); in jpegd_set_stream_offset() local
277 JpegRegSet *reg = &(info->regs); in jpegd_setup_pp() local
636 JpegRegSet *reg = &(info->regs); in jpegd_gen_regs() local
H A Dhal_jpegd_vdpu1.c44 JpegRegSet *reg = &info->regs; in jpegd_write_code_word_number() local
162 JpegRegSet *reg = &info->regs; in jpegd_set_stream_offset() local
202 JpegRegSet *reg = &info->regs; in jpegd_set_chroma_table_id() local
610 static MPP_RET jpegd_regs_init(JpegRegSet *reg) in jpegd_regs_init()
643 JpegRegSet *reg = &info->regs; in jpegd_gen_regs() local
/rockchip-linux_mpp/mpp/hal/vpu/h264e/
H A Dhal_h264e_vepu2_v2.c252 static RK_S32 setup_output_packet(HalH264eVepu2Ctx *ctx, RK_U32 *reg, MppBuffer buf, RK_U32 offset) in setup_output_packet()
293 RK_U32 *reg = ctx->regs_set.val; in setup_intra_refresh() local
349 RK_U32 *reg = ctx->regs_set.val; in hal_h264e_vepu2_gen_regs_v2() local
692 static void h264e_vepu2_get_mbrc(HalH264eVepuMbRc *mb_rc, H264eVpu2RegSet *reg) in h264e_vepu2_get_mbrc()
H A Dhal_h264e_vepu1_v2.c251 static RK_S32 setup_output_packet(HalH264eVepu1Ctx *ctx, RK_U32 *reg, MppBuffer buf, RK_U32 offset) in setup_output_packet()
299 RK_U32 *reg = ctx->regs_set.val; in hal_h264e_vepu1_gen_regs_v2() local
627 static void h264e_vepu1_get_mbrc(HalH264eVepuMbRc *mb_rc, H264eVpu1RegSet *reg) in h264e_vepu1_get_mbrc()
H A Dhal_h264e_vepu_v2.h24 #define H264E_HAL_SET_REG(reg, addr, val) \ argument
/rockchip-linux_mpp/mpp/hal/rkdec/
H A Dvdpu34x_com.c43 static RK_S32 update_size_offset(Vdpu34xRcbInfo *info, RK_U32 reg, in update_size_offset()
75 void vdpu34x_setup_rcb(Vdpu34xRegCommonAddr *reg, MppDev dev, MppBuffer buf, Vdpu34xRcbInfo *info) in vdpu34x_setup_rcb()
H A Dvdpu382_com.c43 static RK_S32 update_size_offset(Vdpu382RcbInfo *info, RK_U32 reg, in update_size_offset()
75 void vdpu382_setup_rcb(Vdpu382RegCommonAddr *reg, MppDev dev, MppBuffer buf, Vdpu382RcbInfo *info) in vdpu382_setup_rcb()
H A Dvdpu383_com.c64 void vdpu383_setup_rcb(Vdpu383RegCommonAddr *reg, MppDev dev, in vdpu383_setup_rcb()
H A Dvdpu384a_com.c78 void vdpu384a_setup_rcb(Vdpu384aRegCommonAddr *reg, MppDev dev, in vdpu384a_setup_rcb()
/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp.c317 struct vdpp_reg *reg = NULL; in vdpp_start() local
445 struct vdpp_reg *reg = NULL; in vdpp_done() local
H A Dvdpp.h44 struct vdpp_reg reg; member
H A Dvdpp2.c1780 struct vdpp2_reg *reg = NULL; in vdpp2_start() local
1936 struct vdpp2_reg *reg = &ctx->reg; in vdpp2_done() local
/rockchip-linux_mpp/mpp/hal/rkenc/common/
H A Dvepu511_common.c45 Vepu511OsdRegion *reg = &osd_reg->osd_regions[i]; in vepu511_set_osd() local
H A Dvepu5xx_common.h30 #define SET_OSD_INV_THR(index, reg, region)\ argument
/rockchip-linux_mpp/mpp/hal/vpu/m2vd/
H A Dhal_m2vd_vdpu2.c34 M2vdVdpu2Reg *reg = NULL; in hal_m2vd_vdpu2_init() local
/rockchip-linux_mpp/osal/inc/
H A Dmpp_device.h48 void *reg; member
55 void *reg; member
/rockchip-linux_mpp/osal/driver/
H A Dvcodec_service.c437 RK_U32 *reg = (RK_U32*)reg_set; in update_extra_info() local
561 VcodecRegCfg *reg = &p->regs[i]; in vcodec_service_init() local
/rockchip-linux_mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu540c.c45 void *reg; member
783 static void setup_vepu540c_rdo_cfg(vepu540c_rdo_cfg *reg) in setup_vepu540c_rdo_cfg()
1530 RK_U32 *reg = (RK_U32)wr_cfg.reg; in hal_h264e_vepu540c_start() local
H A Dhal_h264e_vepu510.c1953 H264eVepu510Sqi *reg = &regs->reg_sqi; in setup_vepu510_anti_flicker() local
2012 H264eVepu510Sqi *reg = &regs->reg_sqi; in setup_vepu510_anti_smear() local
2249 RK_U32 *reg = (RK_U32)wr_cfg.reg; in hal_h264e_vepu510_start() local
H A Dhal_h264e_vepu511.c1915 H264eVepu511Sqi *reg = &regs->reg_sqi; in setup_vepu511_anti_flicker() local
1974 H264eVepu511Sqi *reg = &regs->reg_sqi; in setup_vepu511_anti_smear() local
2200 RK_U32 *reg = (RK_U32)wr_cfg.reg; in hal_h264e_vepu511_start() local
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu510.c413 H265eVepu510Sqi *reg = reg_sqi; in vepu510_h265_set_atr_regs() local
523 H265eVepu510Sqi *reg = reg_sqi; in vepu510_h265_set_anti_blur_regs() local
621 static void vepu510_h265_rdo_cfg(H265eV510HalContext *ctx, H265eVepu510Sqi *reg, MppEncSceneMode sm) in vepu510_h265_rdo_cfg()
767 static void vepu510_h265_atf_cfg(H265eVepu510Sqi *reg, RK_S32 atf_str) in vepu510_h265_atf_cfg()
828 static void vepu510_h265_smear_cfg(H265eVepu510Sqi *reg, H265eV510HalContext *ctx) in vepu510_h265_smear_cfg()
H A Dhal_h265e_vepu580.c401 static void vepu580_h265_sobel_cfg(hevc_vepu580_wgt *reg) in vepu580_h265_sobel_cfg()
692 static void vepu580_h265_rdo_bias_cfg (vepu580_rdo_cfg *reg, MppEncHwCfg *hw) in vepu580_h265_rdo_bias_cfg()
905 static void vepu580_h265_rdo_cfg (vepu580_rdo_cfg *reg) in vepu580_h265_rdo_cfg()
1235 static void vepu580_h265_scl_cfg(vepu580_rdo_cfg *reg) in vepu580_h265_scl_cfg()
/rockchip-linux_mpp/mpp/hal/vpu/vp8d/
H A Dhal_vp8d_vdpu1.c162 VP8DRegSet_t *reg = (VP8DRegSet_t *)ctx->regs; in hal_vp8_init_hwcfg() local
H A Dhal_vp8d_vdpu2.c164 VP8DRegSet_t *reg = (VP8DRegSet_t *)ctx->regs; in hal_vp8_init_hwcfg() local
/rockchip-linux_mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_ctx.h26 RK_S32 reg; member

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