xref: /rockchip-linux_mpp/mpp/hal/rkenc/common/vepu511_common.c (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1 /* SPDX-License-Identifier: Apache-2.0 */
2 /*
3  * Copyright (c) 2025 Rockchip Electronics Co., Ltd.
4  */
5 
6 #define MODULE_TAG  "vepu511_common"
7 
8 #include <string.h>
9 
10 #include "kmpp_obj.h"
11 #include "kmpp_buffer.h"
12 
13 #include "mpp_log.h"
14 #include "mpp_common.h"
15 #include "vepu511_common.h"
16 #include "jpege_syntax.h"
17 #include "vepu5xx_common.h"
18 #include "hal_enc_task.h"
19 #include "mpp_frame_impl.h"
20 #include "mpp_packet.h"
21 #include "mpp_debug.h"
22 #include "mpp_mem.h"
23 
vepu511_set_osd(Vepu511OsdCfg * cfg,Vepu511Osd * osd_reg)24 MPP_RET vepu511_set_osd(Vepu511OsdCfg * cfg, Vepu511Osd *osd_reg)
25 {
26     Vepu511Osd *regs = osd_reg;
27     MppEncOSDData3 *osd_ptr = cfg->osd_data3;
28     Vepu511OsdRegion *osd_regions = &regs->osd_regions[0];
29     MppEncOSDRegion3 *region = osd_ptr->region;
30     RK_U32 i = 0;
31 
32     if (NULL == osd_regions) {
33         mpp_err_f("invalid reg_regions %p\n", osd_regions);
34     }
35 
36     memset(osd_regions, 0, sizeof(Vepu511OsdRegion) * 8);
37     if (osd_ptr->num_region > 8) {
38         mpp_err_f("do NOT support more than 8 regions invalid num %d\n",
39                   osd_ptr->num_region);
40         mpp_assert(osd_ptr->num_region <= 8);
41         return MPP_NOK;
42     }
43 
44     for (i = 0; i < osd_ptr->num_region; i++, region++) {
45         Vepu511OsdRegion *reg = &osd_reg->osd_regions[i];
46         VepuFmtCfg fmt_cfg;
47         MppFrameFormat fmt = region->fmt;
48         KmppBuffer buffer = NULL;
49         KmppBufCfg buf_cfg = NULL;
50 
51         vepu5xx_set_fmt(&fmt_cfg, fmt);
52         reg->cfg0.osd_en = region->enable;
53         reg->cfg0.osd_range_trns_en = region->range_trns_en;
54         reg->cfg0.osd_range_trns_sel = region->range_trns_sel;
55         reg->cfg0.osd_fmt = fmt_cfg.format;
56         reg->cfg0.osd_rbuv_swap = region->rbuv_swap;
57         reg->cfg1.osd_lt_xcrd = region->lt_x;
58         reg->cfg1.osd_lt_ycrd = region->lt_y;
59         reg->cfg2.osd_rb_xcrd = region->rb_x;
60         reg->cfg2.osd_rb_ycrd = region->rb_y;
61 
62         reg->cfg1.osd_endn = region->osd_endn;
63         reg->cfg5.osd_stride = region->stride;
64         reg->cfg5.osd_ch_ds_mode = region->ch_ds_mode;
65         reg->cfg0.osd_alpha_swap = region->alpha_cfg.alpha_swap;
66         reg->cfg0.osd_fg_alpha = region->alpha_cfg.fg_alpha;
67         reg->cfg0.osd_fg_alpha_sel = region->alpha_cfg.fg_alpha_sel;
68         reg->cfg0.osd_qp_adj_en = region->qp_cfg.qp_adj_en;
69         reg->cfg8.osd_qp_adj_sel = region->qp_cfg.qp_adj_sel;
70         reg->cfg8.osd_qp = region->qp_cfg.qp;
71         reg->cfg8.osd_qp_max = region->qp_cfg.qp_max;
72         reg->cfg8.osd_qp_min = region->qp_cfg.qp_min;
73         reg->cfg8.osd_qp_prj = region->qp_cfg.qp_prj;
74 
75         kmpp_obj_get_by_sptr_f(&buffer, &region->osd_buf);
76         if (buffer) {
77             buf_cfg = kmpp_buffer_to_cfg(buffer);
78             kmpp_buf_cfg_get_fd(buf_cfg, (RK_S32 *)&reg->osd_st_addr);
79         }
80         memcpy(reg->lut, region->lut, sizeof(region->lut));
81     }
82 
83     regs->osd_whi_cfg0.osd_csc_yr = 77;
84     regs->osd_whi_cfg0.osd_csc_yg = 150;
85     regs->osd_whi_cfg0.osd_csc_yb = 29;
86 
87     regs->osd_whi_cfg1.osd_csc_ur = -43;
88     regs->osd_whi_cfg1.osd_csc_ug = -85;
89     regs->osd_whi_cfg1.osd_csc_ub = 128;
90 
91     regs->osd_whi_cfg2.osd_csc_vr = 128;
92     regs->osd_whi_cfg2.osd_csc_vg = -107;
93     regs->osd_whi_cfg2.osd_csc_vb = -21;
94 
95     regs->osd_whi_cfg3.osd_csc_ofst_y = 0;
96     regs->osd_whi_cfg3.osd_csc_ofst_u = 128;
97     regs->osd_whi_cfg3.osd_csc_ofst_v = 128;
98 
99     return MPP_OK;
100 }
101 
vepu511_set_roi(Vepu511RoiCfg * roi_reg_base,MppEncROICfg * roi,RK_S32 w,RK_S32 h)102 MPP_RET vepu511_set_roi(Vepu511RoiCfg *roi_reg_base, MppEncROICfg * roi, RK_S32 w, RK_S32 h)
103 {
104     MppEncROIRegion *region = roi->regions;
105     Vepu511RoiCfg  *roi_cfg = (Vepu511RoiCfg *)roi_reg_base;
106     Vepu511RoiRegion *reg_regions = &roi_cfg->regions[0];
107     MPP_RET ret = MPP_NOK;
108     RK_S32 i = 0;
109 
110     memset(reg_regions, 0, sizeof(Vepu511RoiRegion) * 8);
111     if (NULL == roi_cfg || NULL == roi) {
112         mpp_err_f("invalid buf %p roi %p\n", roi_cfg, roi);
113         goto DONE;
114     }
115 
116     if (roi->number > VEPU511_MAX_ROI_NUM) {
117         mpp_err_f("invalid region number %d\n", roi->number);
118         goto DONE;
119     }
120 
121     /* check region config */
122     ret = MPP_OK;
123     for (i = 0; i < (RK_S32) roi->number; i++, region++) {
124         if (region->x + region->w > w || region->y + region->h > h)
125             ret = MPP_NOK;
126 
127         if (region->intra > 1 || region->qp_area_idx >= VEPU511_MAX_ROI_NUM ||
128             region->area_map_en > 1 || region->abs_qp_en > 1)
129             ret = MPP_NOK;
130 
131         if ((region->abs_qp_en && region->quality > 51) ||
132             (!region->abs_qp_en && (region->quality > 51 || region->quality < -51)))
133             ret = MPP_NOK;
134 
135         if (ret) {
136             mpp_err_f("region %d invalid param:\n", i);
137             mpp_err_f("position [%d:%d:%d:%d] vs [%d:%d]\n",
138                       region->x, region->y, region->w, region->h, w, h);
139             mpp_err_f("force intra %d qp area index %d\n",
140                       region->intra, region->qp_area_idx);
141             mpp_err_f("abs qp mode %d value %d\n",
142                       region->abs_qp_en, region->quality);
143             goto DONE;
144         }
145 
146         reg_regions->roi_pos_lt.roi_lt_x = MPP_ALIGN(region->x, 16) >> 4;
147         reg_regions->roi_pos_lt.roi_lt_y = MPP_ALIGN(region->y, 16) >> 4;
148         reg_regions->roi_pos_rb.roi_rb_x = MPP_ALIGN(region->x + region->w, 16) >> 4;
149         reg_regions->roi_pos_rb.roi_rb_y = MPP_ALIGN(region->y + region->h, 16) >> 4;
150         reg_regions->roi_base.roi_qp_value = region->quality;
151         reg_regions->roi_base.roi_qp_adj_mode = region->abs_qp_en;
152         reg_regions->roi_base.roi_en = 1;
153         reg_regions->roi_base.roi_pri = 0x1f;
154         if (region->intra) {
155             reg_regions->reg1063.roi0_mdc0_hevc.mdc_intra16 = 1;
156             reg_regions->roi_mdc_hevc.mdc_intra32 = 1;
157         }
158         reg_regions++;
159     }
160 
161 DONE:
162     return ret;
163 }
164 
165 
166