| /rk3399_ARM-atf/plat/mediatek/lib/pm/armv8_2/ |
| H A D | pwr_ctrl.c | 153 static void armv8_2_cpu_pwr_on_common(const struct mtk_cpupm_pwrstate *state, unsigned int pstate) in armv8_2_cpu_pwr_on_common()
169 static void armv8_2_cpu_pwr_dwn_common(const struct mtk_cpupm_pwrstate *state, unsigned int pstate) in armv8_2_cpu_pwr_dwn_common()
180 static void armv8_2_cpu_pwr_resume(const struct mtk_cpupm_pwrstate *state, unsigned int pstate) in armv8_2_cpu_pwr_resume()
188 static void armv8_2_cpu_pwr_suspend(const struct mtk_cpupm_pwrstate *state, unsigned int pstate) in armv8_2_cpu_pwr_suspend()
196 static void armv8_2_cpu_pwr_on(const struct mtk_cpupm_pwrstate *state, unsigned int pstate) in armv8_2_cpu_pwr_on()
205 static void armv8_2_cpu_pwr_off(const struct mtk_cpupm_pwrstate *state, unsigned int pstate) in armv8_2_cpu_pwr_off()
233 unsigned int pstate = (MT_CPUPM_PWR_DOMAIN_CORE | MT_CPUPM_PWR_DOMAIN_PERCORE_DSU); in armv8_2_power_domain_on_finish() local
258 unsigned int pstate = (MT_CPUPM_PWR_DOMAIN_CORE | MT_CPUPM_PWR_DOMAIN_PERCORE_DSU); in armv8_2_power_domain_off() local
281 unsigned int pstate = 0; in armv8_2_power_domain_suspend() local
319 unsigned int pstate = 0; in armv8_2_power_domain_suspend_finish() local
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| /rk3399_ARM-atf/plat/mediatek/lib/pm/armv9_0/ |
| H A D | pwr_ctrl.c | 146 unsigned int pstate) in cpu_pwr_on_common()
154 unsigned int pstate) in cpu_pwr_dwn_common()
163 unsigned int pstate) in cpu_pwr_resume()
171 unsigned int pstate) in cpu_pwr_suspend()
179 unsigned int pstate) in cpu_pwr_on()
187 unsigned int pstate) in cpu_pwr_off()
215 unsigned int pstate = (MT_CPUPM_PWR_DOMAIN_CORE | in power_domain_on_finish() local
241 unsigned int pstate = (MT_CPUPM_PWR_DOMAIN_CORE | in power_domain_off() local
267 unsigned int pstate = 0; in power_domain_suspend() local
301 unsigned int pstate = 0; in power_domain_suspend_finish() local
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| /rk3399_ARM-atf/plat/imx/imx8m/ddr/ |
| H A D | ddr4_dvfs.c | 77 void dram_cfg_all_mr(struct dram_info *info, uint32_t pstate) in dram_cfg_all_mr()
95 void sw_pstate(uint32_t pstate, uint32_t drate) in sw_pstate()
161 void ddr4_swffc(struct dram_info *info, unsigned int pstate) in ddr4_swffc()
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| /rk3399_ARM-atf/include/drivers/arm/ |
| H A D | ccn.h | 41 #define CCN_GET_RETENTION_STATE(pstate) ((pstate >> 4) & 0x3) argument
47 #define CCN_GET_RUN_STATE(pstate) (pstate & 0xf) argument
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| /rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv3_2/ |
| H A D | mt_cpu_pm.c | 204 unsigned int pstate = MT_CPUPM_PWR_DOMAIN_CORE; in cpupm_do_pstate_off() local
259 unsigned int pstate = MT_CPUPM_PWR_DOMAIN_CORE; in cpupm_do_pstate_on() local
341 unsigned int pstate = 0; in cpupm_get_pstate() local
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| /rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/topology/default/ |
| H A D | pwr.c | 51 unsigned int pstate = 0; in pwr_domain_coordination() local
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| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_pm.c | 27 unsigned int pstate = psci_get_pstate_type(power_state); in arm_validate_power_state() local
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| /rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/topology/group_4_3_1/ |
| H A D | pwr.c | 65 unsigned int pstate = MT_CPUPM_PWR_DOMAIN_CORE; in pwr_domain_coordination() local
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| /rk3399_ARM-atf/plat/hisilicon/poplar/ |
| H A D | plat_pm.c | 118 int pstate = psci_get_pstate_type(power_state); in poplar_validate_power_state() local
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| /rk3399_ARM-atf/drivers/imx/usdhc/ |
| H A D | imx_usdhc.c | 116 uint32_t pstate; in imx_usdhc_set_clk() local
265 uint32_t xfertype, pstate, intstat, sysctrl; in imx_usdhc_send_cmd() local
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| /rk3399_ARM-atf/plat/xilinx/zynqmp/ |
| H A D | plat_psci.c | 218 uint32_t pstate = psci_get_pstate_type(power_state); in zynqmp_validate_power_state() local
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| /rk3399_ARM-atf/plat/xilinx/versal/ |
| H A D | plat_psci.c | 281 uint32_t pstate = psci_get_pstate_type(power_state); in versal_validate_power_state() local
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| /rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/ |
| H A D | mt_cpu_pm.c | 537 unsigned int pstate = MT_CPUPM_PWR_DOMAIN_CORE; in cpupm_do_pstate_off() local
576 unsigned int pstate = MT_CPUPM_PWR_DOMAIN_CORE; in cpupm_do_pstate_on() local
702 unsigned int pstate = 0; in cpupm_get_pstate() local
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| /rk3399_ARM-atf/plat/hisilicon/hikey/ |
| H A D | hikey_pm.c | 217 int pstate = psci_get_pstate_type(power_state); in hikey_validate_power_state() local
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| /rk3399_ARM-atf/plat/ti/k3/common/ |
| H A D | k3_psci.c | 232 unsigned int pstate = psci_get_pstate_type(power_state); in k3_validate_power_state() local
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| /rk3399_ARM-atf/plat/renesas/rcar_gen4/ |
| H A D | plat_pm.c | 162 uint32_t pstate = psci_get_pstate_type(power_state); in rcar_validate_power_state() local
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| /rk3399_ARM-atf/plat/brcm/board/stingray/src/ |
| H A D | brcm_pm_ops.c | 347 int pstate = psci_get_pstate_type(power_state); in brcm_validate_power_state() local
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_pm.c | 141 unsigned int pstate = psci_get_pstate_type(power_state); in hikey960_validate_power_state() local
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| /rk3399_ARM-atf/plat/renesas/common/ |
| H A D | plat_pm.c | 258 unsigned int pstate = psci_get_pstate_type(power_state); in rcar_validate_power_state() local
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| /rk3399_ARM-atf/plat/amd/versal2/ |
| H A D | plat_psci_pm.c | 317 uint32_t pstate = psci_get_pstate_type(power_state); in versal2_validate_power_state() local
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| /rk3399_ARM-atf/plat/xilinx/versal_net/ |
| H A D | plat_psci_pm.c | 314 uint32_t pstate = psci_get_pstate_type(power_state); in versal_net_validate_power_state() local
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| /rk3399_ARM-atf/plat/mediatek/mt8195/ |
| H A D | plat_pm.c | 296 unsigned int pstate = psci_get_pstate_type(power_state); in plat_validate_power_state() local
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| /rk3399_ARM-atf/plat/mediatek/mt8192/ |
| H A D | plat_pm.c | 298 unsigned int pstate = psci_get_pstate_type(power_state); in plat_validate_power_state() local
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| /rk3399_ARM-atf/plat/mediatek/mt8186/ |
| H A D | plat_pm.c | 293 unsigned int pstate = psci_get_pstate_type(power_state); in plat_validate_power_state() local
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| /rk3399_ARM-atf/drivers/arm/ccn/ |
| H A D | ccn_private.h | 161 #define PSTATE_TO_RUN_MODE(pstate) (((pstate) & HNF_PSTATE_MASK) >> 2) argument
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