| #
c6c0bf52 |
| 08-Jul-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(nxp-mmc): add timeout to blocking loops" into integration
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| #
01d24d69 |
| 06-Jun-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(nxp-mmc): add timeout to blocking loops
Replace all register polling loops with timeout-enabled versions, allowing the caller to decide whether to panic or handle the error gracefully.
Change-
feat(nxp-mmc): add timeout to blocking loops
Replace all register polling loops with timeout-enabled versions, allowing the caller to decide whether to panic or handle the error gracefully.
Change-Id: If296f06a20cb849e690d1193bda1378508d3f7e0 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
d0ce1ac5 |
| 20-Jun-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "s32g274a/sd_support" into integration
* changes: feat(s32g274a): move fip in a dedicated partition feat(s32g274ardb): initialize the IO buffer feat(s32g274ardb): init
Merge changes from topic "s32g274a/sd_support" into integration
* changes: feat(s32g274a): move fip in a dedicated partition feat(s32g274ardb): initialize the IO buffer feat(s32g274ardb): initialize the uSDHC driver feat(s32g274ardb): set the system counter rate feat(s32g274ardb): init the generic timer for BL2 fix(nxp-mmc): handle response for CMD0 refactor(mmc): replace 0 with MMC_RESPONSE_NONE feat(mmc): add define for no response
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| #
92a7b540 |
| 11-Jun-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): handle response for CMD0
Fixed a regression introduced by commit a59d43fc222d ("refactor(nxp-mmc): populate command transfer type").
The commit incorrectly assumes that all commands w
fix(nxp-mmc): handle response for CMD0
Fixed a regression introduced by commit a59d43fc222d ("refactor(nxp-mmc): populate command transfer type").
The commit incorrectly assumes that all commands will have a response type, which is not always the case. For instance, Command 0 (used to reset the card and enter idle state) does not expect a response. As a result, the response type field will be explicitly set to zero in such cases.
Change-Id: Id97b765b9720bbd02fafb30a271f134536fab5a6 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
4f51d8f7 |
| 06-Jun-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "nxp-mmc/fixes" into integration
* changes: feat(nxp-mmc): add dynamic mapping fix(nxp-mmc): wait SDSTB before changing the clock fix(nxp-mmc): fix the clock rate calc
Merge changes from topic "nxp-mmc/fixes" into integration
* changes: feat(nxp-mmc): add dynamic mapping fix(nxp-mmc): wait SDSTB before changing the clock fix(nxp-mmc): fix the clock rate calculation fix(nxp-mmc): remove unnecessary delay feat(nxp-mmc): flush and invalidate buffers feat(nxp-mmc): add data buffer refactor(nxp-mmc): check multi block transfer refactor(nxp-mmc): set MIXCTRL_DTDSEL refactor(nxp-mmc): populate command transfer type fix(nxp-mmc): fix clk_rate and bus_width type fix(nxp-mmc): correct the usage of BIT and GENMASK docs(changelog): add subsection for uSDHC
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| #
cdf002de |
| 28-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(nxp-mmc): add dynamic mapping
Dynamically add an MMU entry for the uSDHC controller.
Change-Id: Ifd21fcee79392a1432aa7444aec168105a95a002 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciu
feat(nxp-mmc): add dynamic mapping
Dynamically add an MMU entry for the uSDHC controller.
Change-Id: Ifd21fcee79392a1432aa7444aec168105a95a002 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
583a544c |
| 28-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): wait SDSTB before changing the clock
According to the reference manual, the host driver must ensure that the SDSTB field is high before changing the clock divisor value (SDCLKFS or DVS
fix(nxp-mmc): wait SDSTB before changing the clock
According to the reference manual, the host driver must ensure that the SDSTB field is high before changing the clock divisor value (SDCLKFS or DVS).
Change-Id: I3c89df707a825ccb5e5125b52e2d321b659bbb3f Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
2e90f3e6 |
| 28-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): fix the clock rate calculation
Based on the reference manual's description of SYS_CTRL.SDCLKFS and SYS_CTRL.DVS, the clock rate can be adjusted using a two-stage divider. The value of
fix(nxp-mmc): fix the clock rate calculation
Based on the reference manual's description of SYS_CTRL.SDCLKFS and SYS_CTRL.DVS, the clock rate can be adjusted using a two-stage divider. The value of SYS_CTRL.DVS should be set considering the value of SYS_CTRL.SDCLKFS (pre_div). Consequently, the resulting clock rate is calculated as input_rate / (SYS_CTRL.SDCLKFS * SYS_CTRL.DVS).
Change-Id: I65a5372b8baf9def97e612ee29f99202c0fdc579 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
6347429e |
| 27-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): remove unnecessary delay
There are no references in the reference manual indicating a required delay after resetting INTSIGEN. Therefore, it is safe to remove this step.
Change-Id: Ia
fix(nxp-mmc): remove unnecessary delay
There are no references in the reference manual indicating a required delay after resetting INTSIGEN. Therefore, it is safe to remove this step.
Change-Id: Ia748cfeb8f4a0f619480ef59451df90f85f69fa8 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
7e2a4347 |
| 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(nxp-mmc): flush and invalidate buffers
When the uSDHC driver is used with enabled caches on the core setting the transfer, the caches associated with the memory region used for data transfer mu
feat(nxp-mmc): flush and invalidate buffers
When the uSDHC driver is used with enabled caches on the core setting the transfer, the caches associated with the memory region used for data transfer must be invalidated before reading from the buffer and flushed before the buffer is passed to the controller.
Change-Id: I8213f120b655146772306ef57ee8204596fb05e9 Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
b61379fb |
| 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(nxp-mmc): add data buffer
The prepare callback is used to set buffer details for a transfer. The actual transfer may not occur immediately. Therefore, the details are saved and applied to the n
feat(nxp-mmc): add data buffer
The prepare callback is used to set buffer details for a transfer. The actual transfer may not occur immediately. Therefore, the details are saved and applied to the next data transfer command. This mechanism also helps distinguish between single and multi-block transfers based on the transfer size.
Change-Id: I7bcfde0521ad628e5950dfc71482191ac35433d1 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
f9ed855b |
| 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
refactor(nxp-mmc): check multi block transfer
Extract the multiblock check into a dedicated function. This function returns true for multiblock reads and writes.
Change-Id: I6c4ea62977781a4f43d6a20
refactor(nxp-mmc): check multi block transfer
Extract the multiblock check into a dedicated function. This function returns true for multiblock reads and writes.
Change-Id: I6c4ea62977781a4f43d6a20513147b99b3baa1b2 Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
13a839a7 |
| 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
refactor(nxp-mmc): set MIXCTRL_DTDSEL
According to the reference manual, the MIX_CTRL.DTDSEL should be set for commands involving a transfer from the card to the host. Therefore, it should be disabl
refactor(nxp-mmc): set MIXCTRL_DTDSEL
According to the reference manual, the MIX_CTRL.DTDSEL should be set for commands involving a transfer from the card to the host. Therefore, it should be disabled for write commands, specifically for single and multi-block writes.
Change-Id: I97a08291c6ee134e1d5c7e072a06e1b060d5da14 Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
a59d43fc |
| 17-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
refactor(nxp-mmc): populate command transfer type
The CMD_XFR_TYP register description in the reference manual includes a table where the response type, index check, and CRC check are populated base
refactor(nxp-mmc): populate command transfer type
The CMD_XFR_TYP register description in the reference manual includes a table where the response type, index check, and CRC check are populated based on the CMD's response type. Therefore, replace the CMD_XFR_TYP set based on the command ID with the mechanism mentioned in the reference manual.
Change-Id: Ibe6e04d1682e258ae2377dd7a1d0abb6c7b3f164 Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
3d165079 |
| 04-Apr-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
fix(nxp-mmc): fix clk_rate and bus_width type
Both 'clk_rate' and bus_width members of the 'struct imx_usdhc_params' are defined as integers, while their usages are unsigned int. Therefore, change t
fix(nxp-mmc): fix clk_rate and bus_width type
Both 'clk_rate' and bus_width members of the 'struct imx_usdhc_params' are defined as integers, while their usages are unsigned int. Therefore, change the type to unsigned int. This also helps to avoid MISRA C-2012 Rule 10.3 violations when unsigned values are assigned to signed variables.
Change-Id: If52e15a164732b68286f5303c4acbeb4ff993081 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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| #
601e2d43 |
| 10-Jan-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "bk/warnings" into integration
* changes: docs: describe the new warning levels build: add -Wunused-const-variable=2 to W=2 build: include -Wextra in generic builds
Merge changes from topic "bk/warnings" into integration
* changes: docs: describe the new warning levels build: add -Wunused-const-variable=2 to W=2 build: include -Wextra in generic builds docs(porting-guide): update a reference fix(st-usb): replace redundant checks with asserts fix(brcm): add braces around bodies of conditionals fix(renesas): align incompatible function pointers fix(zynqmp): remove redundant api_version check fix: remove old-style declarations fix: unify fallthrough annotations
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| #
e138400d |
| 18-Nov-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix: unify fallthrough annotations
Compiling with -Wimplicit-fallthrough=3 (enabled by -Wextra) produces many warnings about fallthrough comments either missing or being wrong. Unify the comments so
fix: unify fallthrough annotations
Compiling with -Wimplicit-fallthrough=3 (enabled by -Wextra) produces many warnings about fallthrough comments either missing or being wrong. Unify the comments so we comply with -Wextra.
Note that Coverity recommends against using the __attribute__ directive. Also, zlib does not build with a higher value of -Wimplicit-fallthrough. Finally, compilers strip comments before expanding macros. As such, checkpatch's fallthrough annotation (or higher levels of the flag) isn't really possible.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I060cf4f8dc04c02cbb45cf4ceb69569a8369ccee
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| #
9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
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| #
09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
a3f92142 |
| 12-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1622 from bryanodonoghue/master+imx7-mmc_fix
drivers: imx: mxc_usdhc: Do not set MMC_RSP_48 for MMC_RESPONSE_R2
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| #
a21da478 |
| 10-Oct-2018 |
Bryan O'Donoghue <bryan.odonoghue@linaro.org> |
drivers: imx: mxc_usdhc: Do not set MMC_RSP_48 for MMC_RESPONSE_R2
commit 97d5db8c5cb95c7ce69ff4d36bcda2aeda143576 reverts an update to the MMC layer that accompanied the original submission of this
drivers: imx: mxc_usdhc: Do not set MMC_RSP_48 for MMC_RESPONSE_R2
commit 97d5db8c5cb95c7ce69ff4d36bcda2aeda143576 reverts an update to the MMC layer that accompanied the original submission of this MMC driver this is the right-thing-to-do in terms of the MMC spec.
Unfortunately the reversion also breaks this driver. The issue is the i.MX controller doesn't want MMC_RSP_48 set for MMC_RESPONSE_R2.
The appropriate place to place that constraint is obviously in drivers/imx/usdhc/imx_usdhc.c not in the shared MMC codebase. This patch restores the logic the i.MX controller requires without breaking it for everyone else.
Fixes: 97d5db8c5cb95c7ce69ff4d36bcda2aeda143576 Fixes: 2a82a9c95f6c06079f58d69315544a6b49cf64a4
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Jun Nie <jun.nie@linaro.org>
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| #
36044baf |
| 05-Sep-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1515 from bryanodonoghue/atf-master+linaro-warp7-squash-v4
Atf master+linaro warp7 squash v4
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| #
8b659130 |
| 28-Jun-2018 |
Jun Nie <jun.nie@linaro.org> |
drivers: imx: mxc_usdhc: Add USDHC driver to support boot EMMC
Add USDHC driver to support boot EMMC. Only initialization and single/multiple block read are tested.
[bod: fixed checkpatch.pl compla
drivers: imx: mxc_usdhc: Add USDHC driver to support boot EMMC
Add USDHC driver to support boot EMMC. Only initialization and single/multiple block read are tested.
[bod: fixed checkpatch.pl complaints] [bod: changed name to imx_usdhc for namespace consistency] [bod: squashed antecedent fixes into this one patch]
Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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