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Searched defs:BL1_RW_LIMIT (Results 1 – 15 of 15) sorted by relevance

/rk3399_ARM-atf/plat/ti/k3low/include/
H A Dplatform_def.h32 #define BL1_RW_LIMIT 0x70811000 /* end of RW segment (debug: +4K hack) */ macro
34 #define BL1_RW_LIMIT 0x70810000 /* end of RW segment */ macro
/rk3399_ARM-atf/plat/hisilicon/poplar/include/
H A Dpoplar_layout.h122 #define BL1_RW_LIMIT (BL1_RW_BASE + BL1_RW_SIZE) macro
/rk3399_ARM-atf/plat/hisilicon/hikey/include/
H A Dhikey_layout.h42 #define BL1_RW_LIMIT (0xF9898000) macro
/rk3399_ARM-atf/plat/hisilicon/hikey960/include/
H A Dplatform_def.h56 #define BL1_RW_LIMIT (0x1B000000) macro
/rk3399_ARM-atf/include/plat/marvell/armada/a3k/common/
H A Dmarvell_def.h151 #define BL1_RW_LIMIT (MARVELL_BL_RAM_BASE + MARVELL_BL_RAM_SIZE) macro
/rk3399_ARM-atf/include/plat/marvell/armada/a8k/common/
H A Dmarvell_def.h182 #define BL1_RW_LIMIT (MARVELL_BL_RAM_BASE + MARVELL_BL_RAM_SIZE) macro
/rk3399_ARM-atf/plat/intel/soc/common/include/
H A Dplatform_def.h122 #define BL1_RW_LIMIT (0xffe1ffff) macro
/rk3399_ARM-atf/plat/brcm/board/stingray/include/
H A Dplatform_def.h102 #define BL1_RW_LIMIT (BL1_RW_BASE + 0x12000) macro
/rk3399_ARM-atf/plat/arm/board/fvp_ve/include/
H A Dplatform_def.h210 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
/rk3399_ARM-atf/plat/rpi/rpi3/include/
H A Dplatform_def.h175 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/rk3399_ARM-atf/include/plat/nuvoton/common/
H A Dnpcm845x_arm_def.h427 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
/rk3399_ARM-atf/plat/qemu/qemu/include/
H A Dplatform_def.h130 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/rk3399_ARM-atf/plat/qemu/qemu_sbsa/include/
H A Dplatform_def.h132 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE - \ macro
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd3/
H A Dnrd_plat_arm_def3.h565 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
/rk3399_ARM-atf/include/plat/arm/common/
H A Darm_def.h591 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro