| #
5a9284f7 |
| 30-Nov-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: gem: Fix miiphy_read name
Sync it with write function.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
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| #
687d7312 |
| 30-Nov-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: gem: Remove zynq_gem_of_init()
This function was used for OF init before DM. Remove this function as the part of move to DM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by:
net: gem: Remove zynq_gem_of_init()
This function was used for OF init before DM. Remove this function as the part of move to DM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
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| #
c8e29271 |
| 30-Nov-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: gem: Enable MDIO bus earlier
Enable access to MDIO before zynq_gem_init is called. It enables read information about phy earlier.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
90c6f2e2 |
| 30-Nov-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: gem: Check if priv->phydev is valid
Check return value.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
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| #
68cc3bd8 |
| 30-Nov-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: gem: Extract phy init code
Move phy init code out of zynq_gem_init. DM drivers are normally calling this code from probe function.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
64a7ead6 |
| 30-Nov-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: gem: Remove phydev variable
Resort code to use priv->phydev variable directly. It will simplify move to DM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
f2fc2768 |
| 30-Nov-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: gem: Change mii function not to use eth_device structure
Next step to move driver to driver model. Do not use eth_device structure. Use private structure instead. Add iobase to private structur
net: gem: Change mii function not to use eth_device structure
Next step to move driver to driver model. Do not use eth_device structure. Use private structure instead. Add iobase to private structure to store gem iobase.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
3fac2724 |
| 30-Nov-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: gem: Change mdio_wait prototype to pass regs
Pass regs instead of dev because this will be chagned by driver model.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
b904725a |
| 30-Nov-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: gem: Do not continue if phy is not found
Add return value for phy detection algorithm to stop init function when phy is not found.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewe
net: gem: Do not continue if phy is not found
Add return value for phy detection algorithm to stop init function when phy is not found.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
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| #
aa7077fc |
| 19-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze
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| #
6777f386 |
| 08-Sep-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Fix MDC setting for zynq
Based on spec: "MDC must not exceed 2.5 MHz (MDC is only active during MDIO read and write operations)" Zynq is running on 111MHz. Current setting is 32 which is
net: zynq: Fix MDC setting for zynq
Based on spec: "MDC must not exceed 2.5 MHz (MDC is only active during MDIO read and write operations)" Zynq is running on 111MHz. Current setting is 32 which is 111/32=3.47 which is above of 2.5MHz. Using 48 divider will give us correct setting according spec (111/48=2.31).
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
2889659a |
| 08-Sep-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Remove unused MDCCLKDIV2 macro
Driver cleanup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
242b1547 |
| 08-Sep-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Fix mdc clock division setting for 100Mbit/s
Using set and clear macro is incorrect because it is not overwritting origin mdc clock division setup. For example origin setup is 8(0b001) an
net: zynq: Fix mdc clock division setting for 100Mbit/s
Using set and clear macro is incorrect because it is not overwritting origin mdc clock division setup. For example origin setup is 8(0b001) and new setup is 64(0b100) which means 0b101 is setup which is 96 divider. Using writel to rewrite all setting like for 1000Mbit/s case.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
e4d2318a |
| 17-Aug-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Wait till packet is sent
Wait till BD is processed to ensure that packet was sent successfully.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
603ff008 |
| 26-Sep-2015 |
Edgar E. Iglesias <edgar.iglesias@xilinx.com> |
net: zynq: Disable secondary queues
Zynq has no priority queues. ZynqMP has one priority queue and this change is required to get ethernet working. This patch was not needed on ep108 for uknown reas
net: zynq: Disable secondary queues
Zynq has no priority queues. ZynqMP has one priority queue and this change is required to get ethernet working. This patch was not needed on ep108 for uknown reason even it should be used. Tested on Zynq and ZynqMP.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| #
23a598f7 |
| 17-Aug-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Add dummy packet to fix packet duplication issue
Target is duplicating packets. IP prefetches another BD and process it when the first one is sent. Adding one dummy BD to the chain fix th
net: zynq: Add dummy packet to fix packet duplication issue
Target is duplicating packets. IP prefetches another BD and process it when the first one is sent. Adding one dummy BD to the chain fix the problem with packet duplication.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
081dc2fa |
| 17-Aug-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Do not report TX underrun
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
45c07741 |
| 17-Aug-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Setup BD when structures are filled
Fix incorrect sequence in BD handling.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
ff475878 |
| 17-Aug-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Allocate BD_SPACE in connection to RX_BUF
BD_SEPRN_SPACE should not have hard coded value and it will be calculated based on the number of buffer descriptors that we would like to use.
S
net: zynq: Allocate BD_SPACE in connection to RX_BUF
BD_SEPRN_SPACE should not have hard coded value and it will be calculated based on the number of buffer descriptors that we would like to use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
0ebf4041 |
| 05-Oct-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Fix clearing statistic
Previous loop was completely bogus. Iterration should go just over statistic counters.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershber
net: zynq: Fix clearing statistic
Previous loop was completely bogus. Iterration should go just over statistic counters.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
97a51a03 |
| 05-Oct-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Extend register description with offsets
Extend comments with register offset to help with debuggging.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <jo
net: zynq: Extend register description with offsets
Extend comments with register offset to help with debuggging.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
16ce6de8 |
| 07-Oct-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Add support for different PHY interface types
MII is setup by default for all cases. The most of boards are using RGMII but PHY drivers are not doing any specific setting that's why MII s
net: zynq: Add support for different PHY interface types
MII is setup by default for all cases. The most of boards are using RGMII but PHY drivers are not doing any specific setting that's why MII setting was working fine. With TI DP83867 is necessary to setup paramaters based on interface type.
Use one setting per board for it which is something what will be removed when driver is moved to DM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
198e9a4f |
| 07-Oct-2015 |
Michal Simek <michal.simek@xilinx.com> |
net: zynq: Add debug message to phyread/phywrite
Add debug messages to phyread/write to help with PHY debug.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.her
net: zynq: Add debug message to phyread/phywrite
Add debug messages to phyread/write to help with PHY debug.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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| #
5b47d407 |
| 25-Oct-2015 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
driver: net: Fix pointer conversion warnings for xilinx_zynqmp_ep
Fix below warnings happening for xilinx_zynqmp_ep_defconfig
drivers/net/zynq_gem.c: In function ‘zynq_gem_init’: drivers/net/zynq_g
driver: net: Fix pointer conversion warnings for xilinx_zynqmp_ep
Fix below warnings happening for xilinx_zynqmp_ep_defconfig
drivers/net/zynq_gem.c: In function ‘zynq_gem_init’: drivers/net/zynq_gem.c:330:7: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] ((u32)(priv->rxbuffers) + ^ In file included from drivers/net/zynq_gem.c:19:0: drivers/net/zynq_gem.c:336:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] writel((u32)priv->rx_bd, ®s->rxqbase); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ drivers/net/zynq_gem.c: In function ‘zynq_gem_send’: drivers/net/zynq_gem.c:399:9: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] writel((u32)priv->tx_bd, ®s->txqbase); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ drivers/net/zynq_gem.c:404:22: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] priv->tx_bd->addr = (u32)ptr; ^ drivers/net/zynq_gem.c:409:9: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] addr = (u32) ptr; ^ drivers/net/zynq_gem.c:414:9: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] addr = (u32)priv->rxbuffers; ^ drivers/net/zynq_gem.c: In function ‘zynq_gem_recv’: drivers/net/zynq_gem.c:454:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] net_process_received_packet((u8 *)addr, frame_len); ^ drivers/net/zynq_gem.c: In function ‘zynq_gem_initialize’: drivers/net/zynq_gem.c:533:35: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE); ^ drivers/net/zynq_gem.c:533:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE);
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
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| #
0f925822 |
| 11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in
of: clean up OF_CONTROL ifdef conditionals
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h:
#ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif
Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL.
Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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