rockchip: rk3126c : modify arch_cpu_init()

raise rk3126c cif-qos

Change-Id: Ib16b6a951961a0d46bb2af5196e68182f9a22484
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>

rockchip: rk3128: scan sub-nodes of the syscon node

Change-Id: Id677e5615625abd25c987c899bf4906ee3aed05b
Signed-off-by: William Wu <william.wu@rock-chips.com>

rockchip: rk3128: invoke board_debug_uart_init()

we use uart2 by default.

Change-Id: Ie7e53a57cc08a035184040657eb7a6010bc1c83f
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3128: add a dummy board_debug_uart_init()

Change-Id: Ibb9698b52ee0926eed33198a62d111538022434e
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

rockchip: rk3128: use common board file

move SoC spec setting into rk3128.c

Change-Id: Id3bb2680d7087140510a4b1a8d87e4322e109ca5

rockchip: rk3128: move timer init to arch_cpu_init

The board init is too late.

Change-Id: Ie63e86c98644123d1f611280784252a0cc0ada2e
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

rk312x: add arch_cpu_init implementation

1. set read latency configure;
2. set lcdc cpu axi qos priority level;
3. set GPIO1_C1 iomux to gpio, default sdcard_detn;
4. disable interrupt of rk3126.

C

rk312x: add arch_cpu_init implementation

1. set read latency configure;
2. set lcdc cpu axi qos priority level;
3. set GPIO1_C1 iomux to gpio, default sdcard_detn;
4. disable interrupt of rk3126.

Change-Id: Iebd980e68f4a9fccbf8d620bac0f103571e1d4de
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: rk3128: select BOARD_LATE_INIT

Change-Id: I3d695600bb72bad27d64a8b30411e223a7034747
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3128: add evb-rk3128 support

evb-rk3128 is an evb from Rockchip based on rk3128 SoC:
- 2 USB2.0 Host port;
- 1 HDMI port;
- 2 10/100M eth port;
- 2GB ddr;
- 16GB eMMC;
- UART to USB debu

rockchip: rk3128: add evb-rk3128 support

evb-rk3128 is an evb from Rockchip based on rk3128 SoC:
- 2 USB2.0 Host port;
- 1 HDMI port;
- 2 10/100M eth port;
- 2GB ddr;
- 16GB eMMC;
- UART to USB debug port;

Change-Id: Icfc8b74449678e0e2488f7bf394ec217e52c15b6
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: rk3128: add clock driver

Add rk3128 clock driver and cru structure definition.

Change-Id: Ib6e17f56b2e7e6cc6cdf06f8d9ac44c062b5b6e3
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

rockchip: rk3128: add soc basic support

RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
and device, HDMI/LVDS/MIPI display

rockchip: rk3128: add soc basic support

RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
and device, HDMI/LVDS/MIPI display.

Change-Id: I8b1ded3cadddd7fb3aa6df6eebd882f6cb0c994b
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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