| 9fb0777e | 26-Oct-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: ram: add full feature rk3328 dram driver
This driver supports ddr3/lpddr3/ddr4 sdram initialization.
Since we are going to merge the common part in dram driver for all Rockchip SoCs, this
rockchip: ram: add full feature rk3328 dram driver
This driver supports ddr3/lpddr3/ddr4 sdram initialization.
Since we are going to merge the common part in dram driver for all Rockchip SoCs, this patch become a RFC and can be used for people who need it.
Change-Id: I255411e02089b461fdc384842e23ec2e092f87fb Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
|
| 3d555d75 | 10-Oct-2017 |
Elaine Zhang <zhangqing@rock-chips.com> |
rockchip: clk: add device_bind_driver_to_node for reset driver
all rockchip socs add device_bind_driver_to_node, to bound device rockchip reset to clock-controller.
Change-Id: I03c2a798d211fb4181d5
rockchip: clk: add device_bind_driver_to_node for reset driver
all rockchip socs add device_bind_driver_to_node, to bound device rockchip reset to clock-controller.
Change-Id: I03c2a798d211fb4181d5fc0fd6db8609c6db04d2 Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
|
| 116397d6 | 25-Oct-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: sysreset: merge into one common driver
Use a common driver for all Rockchip SOC instead of one for each SoC. Use driver_data for reg offset.
Change-Id: Ie4a246e53052db47aab9cb3b0105d44a48
rockchip: sysreset: merge into one common driver
Use a common driver for all Rockchip SOC instead of one for each SoC. Use driver_data for reg offset.
Change-Id: Ie4a246e53052db47aab9cb3b0105d44a484db484 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
|
| 7a4b7544 | 25-Oct-2017 |
Frank Wang <frank.wang@rock-chips.com> |
Revert "usb: rockchip: add the rockusb gadget"
Instead of using fastboot framework it is better to use ums framework to improve firmware upgrade speed. Will add a new rockusb driver next.
This reve
Revert "usb: rockchip: add the rockusb gadget"
Instead of using fastboot framework it is better to use ums framework to improve firmware upgrade speed. Will add a new rockusb driver next.
This reverts commit c7cd0ba("usb: rockchip: add the rockusb gadget").
Change-Id: Ie578ee94e247780d6f9b56156b0ccf737fa18cb9 Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
show more ...
|
| 91441457 | 20-Oct-2017 |
francis.fan <francis.fan@rock-chips.com> |
rockchip: add vendor storage api
support read/write configuration data from/to vendor partition that allocated on emmc/nand/spi nor storage devices.
Change-Id: Ie9aaf882f43d78f0baeeafec0c681c7c9e82
rockchip: add vendor storage api
support read/write configuration data from/to vendor partition that allocated on emmc/nand/spi nor storage devices.
Change-Id: Ie9aaf882f43d78f0baeeafec0c681c7c9e82ca97 Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
show more ...
|
| 3e3a3170 | 20-Oct-2017 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3128: support dclk_lcdc and aclk_vio setting
support vop clk setting freq, for uboot logo display.
Change-Id: I766bdc2c3a13d0ee92f81fbd7a30b7cc87c2dceb Signed-off-by: Elaine Zhang
clk: rockchip: rk3128: support dclk_lcdc and aclk_vio setting
support vop clk setting freq, for uboot logo display.
Change-Id: I766bdc2c3a13d0ee92f81fbd7a30b7cc87c2dceb Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
show more ...
|
| 42b2f1bc | 18-Oct-2017 |
Zhaoyifeng <zyf@rock-chips.com> |
3128: clock: config nand controller working clock max 150Mhz
nandc working clock div from gpll and max clock config 150Mhz while gpll config as 600Mhz.
Change-Id: I893d453d031a0ddd0cd79111699d36000
3128: clock: config nand controller working clock max 150Mhz
nandc working clock div from gpll and max clock config 150Mhz while gpll config as 600Mhz.
Change-Id: I893d453d031a0ddd0cd79111699d3600095c6e4f Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
show more ...
|
| dcb51bfe | 16-Oct-2017 |
David Wu <david.wu@rock-chips.com> |
clk: rockchip: Add rk3188 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width.
Change-Id: I186
clk: rockchip: Add rk3188 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width.
Change-Id: I1869cd06615e037548e77eae65df4acdf666a058 Signed-off-by: David Wu <david.wu@rock-chips.com>
show more ...
|
| eb4fc8a1 | 16-Oct-2017 |
David Wu <david.wu@rock-chips.com> |
clk: rockchip: Add rk3128 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width.
Change-Id: I973
clk: rockchip: Add rk3128 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width.
Change-Id: I973b5f50b81559f054ca552ab69ec176cbe3abaa Signed-off-by: David Wu <david.wu@rock-chips.com>
show more ...
|
| 9f9d0158 | 16-Oct-2017 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: clk: rk3128: fix GPIO2C4_SHIFT and GPIO2C5_SHIFT define error
The other I2C definitions are all correct.
Change-Id: I24559cae054db39a203ae44de1519c14ed543b64 Signed-off-by: Joseph Chen <c
rockchip: clk: rk3128: fix GPIO2C4_SHIFT and GPIO2C5_SHIFT define error
The other I2C definitions are all correct.
Change-Id: I24559cae054db39a203ae44de1519c14ed543b64 Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
show more ...
|
| 73e16df2 | 20-Sep-2017 |
David Wu <david.wu@rock-chips.com> |
rockchip: clk: Add rk3368 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width.
Change-Id: I47c
rockchip: clk: Add rk3368 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width.
Change-Id: I47cc95d7e2cbf026bc34042cef4c2fe636bae674 Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> (cherry picked from commit 615514c16dee4d43bd584ea326a5a56ebcb89c85)
show more ...
|
| befbd723 | 20-Sep-2017 |
David Wu <david.wu@rock-chips.com> |
rockchip: clk: Add rv1108 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 10-bits width.
Change-Id: I1f
rockchip: clk: Add rv1108 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 10-bits width.
Change-Id: I1ff152b72a75680601f22c5b621de8b2198a6778 Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> (cherry picked from commit 2e4ce50d1aca35d13944f48a7e15d0b63e86eb38)
show more ...
|
| 2241bfd6 | 10-Mar-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3128: add pinctrl driver
Add rk3128 pinctrl driver and grf/iomux structure definition.
Change-Id: I0bf2f29fc28274f3d7a67beeacdb4f5a57210ba5 Signed-off-by: Kever Yang <kever.yang@rock-ch
rockchip: rk3128: add pinctrl driver
Add rk3128 pinctrl driver and grf/iomux structure definition.
Change-Id: I0bf2f29fc28274f3d7a67beeacdb4f5a57210ba5 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
|
| de4fa243 | 10-Mar-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3128: add clock driver
Add rk3128 clock driver and cru structure definition.
Change-Id: Ib6e17f56b2e7e6cc6cdf06f8d9ac44c062b5b6e3 Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
| f63defb3 | 27-Sep-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3036: fix grf macro define
Some of macros definition are not correct, fix them according to TRM.
Change-Id: If3b7ec621425f1eb1c432b39bf826c896196130b Signed-off-by: Kever Yang <kever.ya
rockchip: rk3036: fix grf macro define
Some of macros definition are not correct, fix them according to TRM.
Change-Id: If3b7ec621425f1eb1c432b39bf826c896196130b Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
|
| be82169b | 25-Sep-2017 |
Wu Liang feng <wulf@rock-chips.com> |
rockchip: rv1108: syscon: add support for usbgrf
usbgrf is a independent module like grf which contain usb phy control registers.
Change-Id: I5676cab33bcdd66b4033c9514b82cac26b6ce3e5 Signed-off-by:
rockchip: rv1108: syscon: add support for usbgrf
usbgrf is a independent module like grf which contain usb phy control registers.
Change-Id: I5676cab33bcdd66b4033c9514b82cac26b6ce3e5 Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
show more ...
|
| 08dcd37c | 04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: add rockchip resource image support
Rockchip resource image is used to store dtb and logos for different usages. This patch adds support to read the files(dtb or logo)stored in resource im
rockchip: add rockchip resource image support
Rockchip resource image is used to store dtb and logos for different usages. This patch adds support to read the files(dtb or logo)stored in resource image format partition.
Change-Id: I65982d340ff4573e5b543965d3857a2c66db8bb9 Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
show more ...
|
| 64da4a85 | 09-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk322x: add sdram driver
Add driver for rk322x to support sdram initialize in SPL.
Series-version: 3 Series-changes: 3 - move rk332x sdram driver to driver/ram - do the ram init in TPL in
rockchip: rk322x: add sdram driver
Add driver for rk322x to support sdram initialize in SPL.
Series-version: 3 Series-changes: 3 - move rk332x sdram driver to driver/ram - do the ram init in TPL instad of SPL
Change-Id: I44f5fed275d65e7758efd38f1a5124a8d9698a7d Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
|
| dd866228 | 14-Aug-2017 |
David Wu <david.wu@rock-chips.com> |
rockchip: rk322x: Disable integrated macphy for saving power consuming
Unfortunately, the integrated macphy default is enabled, which will increase power consuming, if we do not use this PHY. So let
rockchip: rk322x: Disable integrated macphy for saving power consuming
Unfortunately, the integrated macphy default is enabled, which will increase power consuming, if we do not use this PHY. So let's disable it at first, which will save power consuming. If we really use it, then enable it in driver level.
Change-Id: Ieafaf7e1e6fd74de2999fb3d27153e520968d13d Signed-off-by: David Wu <david.wu@rock-chips.com>
show more ...
|
| c7cd0ba4 | 25-May-2017 |
Eddie Cai <eddie.cai.linux@gmail.com> |
usb: rockchip: add the rockusb gadget
this patch implement rockusb protocol on the device side. this is based on USB download gadget infrastructure. the rockusb function implements the rd, wl, rid c
usb: rockchip: add the rockusb gadget
this patch implement rockusb protocol on the device side. this is based on USB download gadget infrastructure. the rockusb function implements the rd, wl, rid commands. it can work with rkdeveloptool
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Changes in v7: -none
Changes in v6: -move some data to f_rockusb structure
Changes in v5: -fix build error when build non-rockchip board -fix checkpatch error
Changes in v4: -use enum instead of macro define -move some structure define and macro to f_rockusb.h -add some function comment as Simon required -address other comment from Simon -fix build error as Lukasz point out
Changes in v3: -split the macro to f_rockusb.h -use ALLOC_CACHE_ALIGN_BUFFER to define cache safe struct inside the function. -fix checkpatch error
show more ...
|
| 40d4f79b | 21-Aug-2017 |
Wadim Egorov <w.egorov@phytec.de> |
rockchip: rk3288: Add reset reason detection
Sometimes it's helpful to know the reset reason caused in the SoC. Add reset reason detection for the RK3288 SoC. This will set an environment variable w
rockchip: rk3288: Add reset reason detection
Sometimes it's helpful to know the reset reason caused in the SoC. Add reset reason detection for the RK3288 SoC. This will set an environment variable which represents the reset reason.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
show more ...
|
| fc760cc6 | 11-Aug-2017 |
Adam Ford <aford173@gmail.com> |
Convert CONFIG_SYS_I2C_BUS_MAX to Kconfig
This converts the following to Kconfig: CONFIG_SYS_I2C_BUS_MAX
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> [t
Convert CONFIG_SYS_I2C_BUS_MAX to Kconfig
This converts the following to Kconfig: CONFIG_SYS_I2C_BUS_MAX
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> [trini: Fix AM43XX drop AM44XX] Signed-off-by: Tom Rini <trini@konsulko.com>
show more ...
|
| ac1d8ac8 | 11-Aug-2017 |
Adam Ford <aford173@gmail.com> |
Configs: Migrate I2C_BUS_MAX to CONFIG_SYS_I2C_BUS_MAX
For consistency with other platforms and in preparation of Kconfig migration, let's change Several TI platforms that use I2C_BUS_MAX to CONFIG_
Configs: Migrate I2C_BUS_MAX to CONFIG_SYS_I2C_BUS_MAX
For consistency with other platforms and in preparation of Kconfig migration, let's change Several TI platforms that use I2C_BUS_MAX to CONFIG_SYS_I2C_BUS_MAX
Signed-off-by: Adam Ford <aford173@gmail.com>
show more ...
|
| 0b6e5b2c | 01-Sep-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sunxi |
| 6ff005cf | 31-Aug-2017 |
Dave Prue <dave@prue.com> |
sunxi: Fix CONFIG_SUNXI_GMAC references
SUNXI_GMAC was still used to configure the code where as the same has been renamed and moved to Kconfig in below commit "sunxi: Move SUNXI_GMAC to Kconfig" (s
sunxi: Fix CONFIG_SUNXI_GMAC references
SUNXI_GMAC was still used to configure the code where as the same has been renamed and moved to Kconfig in below commit "sunxi: Move SUNXI_GMAC to Kconfig" (sha1: 4d43d065db3262f9a9918ba72457bf36dfb8e0bb)
Signed-off-by: Dave Prue <dave@prue.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Tested-by: Mark Kettenis <kettenis@openbsd.org> [Tweek commit message, config_whitelist.txt, build-whitelist.sh] Signed-off-by: Jagan Teki <jagan@openedev.com>
show more ...
|