fix(plat/marvell/a3720/uart): fix UART clock rate value and divisor calculation

UART parent clock is by default the platform's xtal clock, which is
25 MHz.

The value defined in the driver, though,

fix(plat/marvell/a3720/uart): fix UART clock rate value and divisor calculation

UART parent clock is by default the platform's xtal clock, which is
25 MHz.

The value defined in the driver, though, is 25.8048 MHz. This is a hack
for the suboptimal divisor calculation
Divisor = UART clock / (16 * baudrate)
which does not use rounding division, resulting in a suboptimal value
for divisor if the correct parent clock rate was used.

Change the code for divisor calculation to
Divisor = Round(UART clock / (16 * baudrate))
and change the parent clock rate value to 25 MHz.

The final UART divisor for default baudrate 115200 is not affected by
this change.

(Note that the parent clock rate should not be defined via a macro,
since the xtal clock can also be 40 MHz. This is outside of the scope of
this fix, though.)

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Iaa401173df87aec94f2dd1b38a90fb6ed0bf0ec6

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Merge "fix(plat/mediatek/pmic_wrap): update idle flow" into integration

Merge "feat(plat/sgi): enable use of PSCI extended state ID format" into integration

fix(makefile): use space in WARNINGS list

The tab between -Wdisabled-optimization and -Wvla is replaced with
a space. This avoids having it removed when copy/pasting the compilation
command line, an

fix(makefile): use space in WARNINGS list

The tab between -Wdisabled-optimization and -Wvla is replaced with
a space. This avoids having it removed when copy/pasting the compilation
command line, and having the following error:
arm-none-eabi-gcc: error: unrecognized command line option
'-Wdisabled-optimization-Wvla'; did you mean '-Wdisabled-optimization'?

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I72de2a70d192a7813b1f9b55485914142d1fc428

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fix(plat/imx): do not keep mmc_device_info in stack

Create a dedicated static struct mmc_device_info mmc_info mmc_info
instead of having this in stack.
A boot issue has been seen on some platform wh

fix(plat/imx): do not keep mmc_device_info in stack

Create a dedicated static struct mmc_device_info mmc_info mmc_info
instead of having this in stack.
A boot issue has been seen on some platform when applying patch [1].

[1] 13f3c5166f1 ("mmc:prevent accessing to the released space in case of wrong usage")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Iba0424a5787f9e510a60696d4033db1b49b243b2

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refactor(plat/nvidia): use SOC_ID defines

Use the macros that are now defined in include/lib/smccc.h.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ibe3c17acd2482b7779318c8a922a

refactor(plat/nvidia): use SOC_ID defines

Use the macros that are now defined in include/lib/smccc.h.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ibe3c17acd2482b7779318c8a922a138dcace5554

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refactor(plat/mediatek): use SOC_ID defines

Use the macros that are now defined in include/lib/smccc.h.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ie1dbc54569086f6a74206b873f

refactor(plat/mediatek): use SOC_ID defines

Use the macros that are now defined in include/lib/smccc.h.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ie1dbc54569086f6a74206b873fee664b4cdeea36

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refactor(plat/arm): use SOC_ID defines

Use the macros that are now defined in include/lib/smccc.h.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I688a76277b729672835d51fafb68d1d

refactor(plat/arm): use SOC_ID defines

Use the macros that are now defined in include/lib/smccc.h.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I688a76277b729672835d51fafb68d1d6205b6ae4

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feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID

The JEDEC information for STMicroelectronics is:
JEDEC_ST_MFID U(0x20)
JEDEC_ST_BKID U(0x0)
And rely on platform functions to get ch

feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID

The JEDEC information for STMicroelectronics is:
JEDEC_ST_MFID U(0x20)
JEDEC_ST_BKID U(0x0)
And rely on platform functions to get chip IP and revision.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4fa4ac8bb5583b1871b768decc9fe08e8966ff54

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refactor(plat/st): export functions to get SoC information

Three functions are exported to get SoC version, SoC device ID, and SoC
name. Those functions are based on reworked existing static functio

refactor(plat/st): export functions to get SoC information

Three functions are exported to get SoC version, SoC device ID, and SoC
name. Those functions are based on reworked existing static functions.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I1f3949062bb488286a9e7a38ffcd1457953dac56

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feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID

The definitions of SMCCC_ARCH_SOC_ID SoC version return bits are defined
in SMC Calling Convention [1]. Add the masks and shifts for JEP-106 ban

feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID

The definitions of SMCCC_ARCH_SOC_ID SoC version return bits are defined
in SMC Calling Convention [1]. Add the masks and shifts for JEP-106 bank
index, JEP-106 identification code, and Implementation defined SoC ID.
Add a macro to easily set JEP-106 fields.

[1] https://developer.arm.com/documentation/den0028/latest/

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Iecbd09f6de6728de89dc746d2d1981a5a97a8ab7

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Merge changes from topic "Arm_PCI_Config_Space_Interface" into integration

* changes:
TF-A: Document SMC_PCI_SUPPORT option
SMCCC/PCI: Handle std svc boilerplate
SMCCC/PCI: Add initial PCI con

Merge changes from topic "Arm_PCI_Config_Space_Interface" into integration

* changes:
TF-A: Document SMC_PCI_SUPPORT option
SMCCC/PCI: Handle std svc boilerplate
SMCCC/PCI: Add initial PCI conduit definitions
SMCCC: Hoist SMC_32 sanitization

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feat(plat/sgi): enable use of PSCI extended state ID format

The SGI/RD platforms have been using PSCI state ID format as defined in
PSCI version prior to 1.0. This is being changed and the PSCI exte

feat(plat/sgi): enable use of PSCI extended state ID format

The SGI/RD platforms have been using PSCI state ID format as defined in
PSCI version prior to 1.0. This is being changed and the PSCI extended
state ID format as defined in PSCI version 1.1 is being adapted. In
addition to this, the use of Arm recommended PSCI state ID encoding is
enabled as well.

Change-Id: I2be8a9820987a96b23f4281563b6fa22db48fa5f
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>

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fix(plat/mediatek/pmic_wrap): update idle flow

Update idle flow in case of last read command timeout.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Change-Id: Idb0552d70d59b23822c

fix(plat/mediatek/pmic_wrap): update idle flow

Update idle flow in case of last read command timeout.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Change-Id: Idb0552d70d59b23822c38269d0fa9fe9ac0d6975

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Merge "fix(services): drop warning on unimplemented calls" into integration

Merge "fix(docs): fix typos in v2.5 release documentation" into integration

Merge changes from topic "mt8192-apu" into integration

* changes:
feat(plat/mediatek/apu): add mt8192 APU device apc driver
feat(plat/mediatek/apu): add mt8192 APU SiP call support
feat(plat/m

Merge changes from topic "mt8192-apu" into integration

* changes:
feat(plat/mediatek/apu): add mt8192 APU device apc driver
feat(plat/mediatek/apu): add mt8192 APU SiP call support
feat(plat/mediatek/apu): add mt8192 APU iommap regions
feat(plat/mediatek/apu): setup mt8192 APU_S_S_4 and APU_S_S_5 permission

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Merge "feat(plat/sgi): enable AMU for RD-V1-MC" into integration

Merge "fix(plat/xilinx/versal/include): correct IPI buffer offset" into integration

feat(plat/mediatek/apu): add mt8192 APU device apc driver

Add APU device apc driver and setup permission.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: I2bbdb69d11267e4252b2138b5c5ac8f

feat(plat/mediatek/apu): add mt8192 APU device apc driver

Add APU device apc driver and setup permission.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: I2bbdb69d11267e4252b2138b5c5ac8faf752740f

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feat(plat/mediatek/apu): add mt8192 APU SiP call support

Add APU SiP call support for start/stop mcu.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: Ibf93d8ccf22c414de3093cee9e13f766858

feat(plat/mediatek/apu): add mt8192 APU SiP call support

Add APU SiP call support for start/stop mcu.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: Ibf93d8ccf22c414de3093cee9e13f7668588f69e
Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@mediatek.com>

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feat(plat/mdeiatek/mt8195): add display port control in SiP service

MTK display port mute/unmute control registers need to be
set in secure world.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.c

feat(plat/mdeiatek/mt8195): add display port control in SiP service

MTK display port mute/unmute control registers need to be
set in secure world.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Iec73650e937bd20e25c18fa28d55ae29e68b10d3

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fix(docs): fix typos in v2.5 release documentation

Two issues in documentation were identified after the release.
This patch fixes these typos.

1. Matternhorn ELP CPU was made available through v2.

fix(docs): fix typos in v2.5 release documentation

Two issues in documentation were identified after the release.
This patch fixes these typos.

1. Matternhorn ELP CPU was made available through v2.5 release, not
Matternhorn CPU
2. We had upgraded TF-A to use GCC 10.2 toolchain family and used this
toolchain for release testing

Change-Id: I33e59bb5a6d13f4d40dbb3352004d5b133431d65
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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fix(plat/xilinx/versal/include): correct IPI buffer offset

Use proper offset for IPI data based on offset for IPI0
channel.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Abhyuday

fix(plat/xilinx/versal/include): correct IPI buffer offset

Use proper offset for IPI data based on offset for IPI0
channel.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I3070517944dd353c3733aa595df0da030127751a

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rpi4: update the iobase constant

The PCIe root port is outside of the current RPi
MMIO regions, so we need to adjust the address map.
Given much of the code depends on the legacy IOBASE
lets separat

rpi4: update the iobase constant

The PCIe root port is outside of the current RPi
MMIO regions, so we need to adjust the address map.
Given much of the code depends on the legacy IOBASE
lets separate that from the actual MMIO begin/end.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Change-Id: Id65460ae58556bd8826dba08bbad79953e2a7c0b

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