History log of /rk3399_ARM-atf/ (Results 9326 – 9350 of 18314)
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db97f93917-Jun-2021 Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>

refactor(plat/zynqmp): optimize the code to save some space

As there is constraint with the space for the release builds,
remove some of the legacy code.

Signed-off-by: Venkatesh Yadav Abbarapu <ve

refactor(plat/zynqmp): optimize the code to save some space

As there is constraint with the space for the release builds,
remove some of the legacy code.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I5b8b16f34ed8e480f16ab1aeac80b85cdb391852

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60a0dde903-Jun-2021 Igor Opaniuk <igor.opaniuk@foundries.io>

feat(plat/imx8m): add system_reset2 implementation

Add imx_system_reset2 which extends existing SYSTEM_RESET. It provides
architectural reset definitions and vendor-specific resets.
By default warm

feat(plat/imx8m): add system_reset2 implementation

Add imx_system_reset2 which extends existing SYSTEM_RESET. It provides
architectural reset definitions and vendor-specific resets.
By default warm reset is triggered.

Also refactor existing implementation of wdog reset, add details about
each flag used.

Change-Id: Ia7348c32c385f1c61f8085776e81dd1e38ddda5c
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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5d582ff916-Jun-2021 Manish Pandey <manish.pandey2@arm.com>

Merge "refactor(plat/st): avoid fixed DT address" into integration

96a0f97816-Jun-2021 Manish Pandey <manish.pandey2@arm.com>

Merge "rpi4: update the iobase constant" into integration

6e34127516-Jun-2021 Manish Pandey <manish.pandey2@arm.com>

Merge changes Iaf441fe5,I0355ca26 into integration

* changes:
refactor(gicv3): use helper functions to get SPI/ESPI INTID limit
refactor(gicv3): add helper function to get the limit of ESPI INTID

16b69ff516-Jun-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix(fdts/morello): fix scmi clock specifier to cluster mappings" into integration

f85ab34116-Jun-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes I4451ca03,I29be60ec,Ia30bd332,I72fe2275,I37bd65b0 into integration

* changes:
feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition
feat(plat/nxp/common): add build macro for BOOT

Merge changes I4451ca03,I29be60ec,Ia30bd332,I72fe2275,I37bd65b0 into integration

* changes:
feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition
feat(plat/nxp/common): add build macro for BOOT_MODE validation checking
refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk
refactor(plat/nxp/lx216x): clean up platform configure file
refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk

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387a906505-May-2021 Anurag Koul <anurag.koul@arm.com>

fix(fdts/morello): fix scmi clock specifier to cluster mappings

Fix the mapping of SCMI clock specifiers to the clusters they drive.
Also, add CPU cores to cluster mappings.

Signed-off-by: Anurag K

fix(fdts/morello): fix scmi clock specifier to cluster mappings

Fix the mapping of SCMI clock specifiers to the clusters they drive.
Also, add CPU cores to cluster mappings.

Signed-off-by: Anurag Koul <anurag.koul@arm.com>
Change-Id: I230bea5614de4e29b54e1686b31bf01c0b6aa86c

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2a00877916-Jun-2021 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "soc_id" into integration

* changes:
refactor(plat/nvidia): use SOC_ID defines
refactor(plat/mediatek): use SOC_ID defines
refactor(plat/arm): use SOC_ID defines
fea

Merge changes from topic "soc_id" into integration

* changes:
refactor(plat/nvidia): use SOC_ID defines
refactor(plat/mediatek): use SOC_ID defines
refactor(plat/arm): use SOC_ID defines
feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
refactor(plat/st): export functions to get SoC information
feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID

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ce2b49b820-Jan-2021 Heyi Guo <guoheyi@linux.alibaba.com>

refactor(gicv3): use helper functions to get SPI/ESPI INTID limit

Use helper functions to get SPI and ESPI INTID limit, to remove
several pieces of similar code in gicv3 driver.

Signed-off-by: Heyi

refactor(gicv3): use helper functions to get SPI/ESPI INTID limit

Use helper functions to get SPI and ESPI INTID limit, to remove
several pieces of similar code in gicv3 driver.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: Iaf441fe5e333c4260e7f6d98df6fdd931591976d

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30524ff820-Jan-2021 Heyi Guo <guoheyi@linux.alibaba.com>

refactor(gicv3): add helper function to get the limit of ESPI INTID

Add helper function gicv3_get_espi_limit() to get the value of
(maximum extended SPI INTID + 1), so that some duplicated code can

refactor(gicv3): add helper function to get the limit of ESPI INTID

Add helper function gicv3_get_espi_limit() to get the value of
(maximum extended SPI INTID + 1), so that some duplicated code can be
removed later.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: I0355ca2647f872e8189add259f6c47d415494cce

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ed0f0a0915-Jun-2021 Mark Dykes <mark.dykes@arm.com>

Merge "docs: change Linaro release version to 20.01" into integration

28b3221a27-Apr-2021 Jiafei Pan <Jiafei.Pan@nxp.com>

feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition

Add macro of SUPPORTED_BOOT_MODE for board lx2160ardb, lx2160aqds,
lx2162aqds.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafe

feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition

Add macro of SUPPORTED_BOOT_MODE for board lx2160ardb, lx2160aqds,
lx2162aqds.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I4451ca030eca79c9bc5fee928eec497a7f0e878c

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cd1280ea27-Apr-2021 Jiafei Pan <Jiafei.Pan@nxp.com>

feat(plat/nxp/common): add build macro for BOOT_MODE validation checking

1. Added the build macro "add_boot_mode_define".
2. Use the macro to validate current BOOT_MODE against the
pre-determined

feat(plat/nxp/common): add build macro for BOOT_MODE validation checking

1. Added the build macro "add_boot_mode_define".
2. Use the macro to validate current BOOT_MODE against the
pre-determined list of SUPPORTED_BOOT_MODE, so each platform
need to define the list: SUPPORTED_BOOT_MODE.
3. Reports error if BOOT_MODE is not in SUPPORTED_BOOT_MODE list,
or BOOT_MODE is not supported yet althoug it is in SUPPORTED_BOOT_MODE.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I29be60ecdb19fbec1cd162e327cdfb30ba629b07

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9398841e05-Jan-2021 Jiafei Pan <Jiafei.Pan@nxp.com>

refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk

Move some soc make variables to new soc_common_def.mk,
then it can be reused by other platforms.

Signed-off-by: Jiafei P

refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk

Move some soc make variables to new soc_common_def.mk,
then it can be reused by other platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia30bd332c95b6475f1cfee2f03a8ed3892a9568d

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9663160d04-Jan-2021 Jiafei Pan <Jiafei.Pan@nxp.com>

refactor(plat/nxp/lx216x): clean up platform configure file

Use common code in common file to configure platform.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I72fe22751f12b8a4996a7b9f

refactor(plat/nxp/lx216x): clean up platform configure file

Use common code in common file to configure platform.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I72fe22751f12b8a4996a7b9f75fae4c912ea86de

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5d5c3ff304-Jan-2021 Jiafei Pan <Jiafei.Pan@nxp.com>

refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk

Move some common make variables to new plat_common_def.mk,
then it can be reused by other platforms.

Signed-off-by: Ji

refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk

Move some common make variables to new plat_common_def.mk,
then it can be reused by other platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I37bd65b0f8124f63074fa03339f886c2cdb30bd3

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f1b6b01425-May-2021 Yann Gautier <yann.gautier@foss.st.com>

refactor(dt-bindings): align irq bindings with kernel

The arm-gic.h was a concatenation of arm-gic.h and irq.h from Linux.
Just copy the 2 files here. They both have MIT license which is accepted
in

refactor(dt-bindings): align irq bindings with kernel

The arm-gic.h was a concatenation of arm-gic.h and irq.h from Linux.
Just copy the 2 files here. They both have MIT license which is accepted
in TF-A.
With this alignment, a new macro is added (GIC_CPU_MASK_SIMPLE).

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib45174f35f1796ebb7f34af861b59810cfb808b0

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0a8143dd27-May-2021 Michal Simek <michal.simek@xilinx.com>

feat(plat/zynqmp): extend DT description by TF-A

In case of TF-A running out of DDR there is a need to reserved
memory to let other SW know that none can't use this memory. HW
wise this region can b

feat(plat/zynqmp): extend DT description by TF-A

In case of TF-A running out of DDR there is a need to reserved
memory to let other SW know that none can't use this memory. HW
wise this region can be (and should be) also protected by
protection unit XMPU. This is the first step to add reserved
memory location to DT.

DT address corresponds with default address in U-Boot and also
default address in Xilinx BSPs.

Code is valid only when TF-A runs out of DDR. When it runs out
of OCM there is no need to reseve anything because OCM is hidden
to OS.

Change-Id: I01f230ced67207a159128cc11d11d36dd4590cab
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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6b63125c25-Mar-2021 Peng Fan <peng.fan@nxp.com>

feat(plat/imx8m): add sdei support for i.MX8MP

Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled rout

feat(plat/imx8m): add sdei support for i.MX8MP

Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled routing.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I8308c629448bd8adca9d3d25701adcf0c5a6afc2

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ce2be32125-Mar-2021 Peng Fan <peng.fan@nxp.com>

feat(plat/imx8m): add sdei support for i.MX8MN

Add sdei support for i.MX8MN, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled rout

feat(plat/imx8m): add sdei support for i.MX8MN

Add sdei support for i.MX8MN, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled routing.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: Ie15fffdd09e1bba1b22334b8ccac2335c96b8b4d

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a57e6e4911-Jun-2021 Alexei Fedorov <Alexei.Fedorov@arm.com>

Merge "refactor(gicv3): add helper function to get the limit of SPI INTID" into integration

dd0592c910-Jun-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "docs: change owner for MediaTek platforms" into integration

9598863d10-Jun-2021 Joanna Farley <joanna.farley@arm.com>

Merge "build(hooks): bump trim-newlines from 3.0.0 to 3.0.1" into integration

7249e7f910-Jun-2021 dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>

build(hooks): bump trim-newlines from 3.0.0 to 3.0.1

Bumps [trim-newlines](https://github.com/sindresorhus/trim-newlines) from 3.0.0 to 3.0.1.
- [Release notes](https://github.com/sindresorhus/trim-

build(hooks): bump trim-newlines from 3.0.0 to 3.0.1

Bumps [trim-newlines](https://github.com/sindresorhus/trim-newlines) from 3.0.0 to 3.0.1.
- [Release notes](https://github.com/sindresorhus/trim-newlines/releases)
- [Commits](https://github.com/sindresorhus/trim-newlines/commits)

---
updated-dependencies:
- dependency-name: trim-newlines
dependency-type: indirect
...

Change-Id: Ie7bcbf8a328d43de004c2f2dbe731f865ef0024d
Signed-off-by: dependabot[bot] <support@github.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>

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