1TF-A Build Instructions for Marvell Platforms 2============================================= 3 4This section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms. 5 6Build Instructions 7------------------ 8(1) Set the cross compiler 9 10 .. code:: shell 11 12 > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu- 13 14(2) Set path for FIP images: 15 16Set U-Boot image path (relatively to TF-A root or absolute path) 17 18 .. code:: shell 19 20 > export BL33=path/to/u-boot.bin 21 22For example: if U-Boot project (and its images) is located at ``~/project/u-boot``, 23BL33 should be ``~/project/u-boot/u-boot.bin`` 24 25 .. note:: 26 27 *u-boot.bin* should be used and not *u-boot-spl.bin* 28 29Set MSS/SCP image path (mandatory only for A7K/8K/CN913x when MSS_SUPPORT=1) 30 31 .. code:: shell 32 33 > export SCP_BL2=path/to/mrvl_scp_bl2*.img 34 35(3) Armada-37x0 build requires WTP tools installation. 36 37See below in the section "Tools and external components installation". 38Install ARM 32-bit cross compiler, which is required for building WTMI image for CM3 39 40 .. code:: shell 41 42 > sudo apt-get install gcc-arm-linux-gnueabi 43 44(4) Clean previous build residuals (if any) 45 46 .. code:: shell 47 48 > make distclean 49 50(5) Build TF-A 51 52There are several build options: 53 54- PLAT 55 56 Supported Marvell platforms are: 57 58 - a3700 - A3720 DB, EspressoBin and Turris MOX 59 - a70x0 60 - a70x0_amc - AMC board 61 - a80x0 62 - a80x0_mcbin - MacchiatoBin 63 - a80x0_puzzle - IEI Puzzle-M801 64 - t9130 - CN913x 65 - t9130_cex7_eval - CN913x CEx7 Evaluation Board 66 67- DEBUG 68 69 Default is without debug information (=0). in order to enable it use ``DEBUG=1``. 70 Must be disabled when building UART recovery images due to current console driver 71 implementation that is not compatible with Xmodem protocol used for boot image download. 72 73- LOG_LEVEL 74 75 Defines the level of logging which will be purged to the default output port. 76 77 - 0 - LOG_LEVEL_NONE 78 - 10 - LOG_LEVEL_ERROR 79 - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0) 80 - 30 - LOG_LEVEL_WARNING 81 - 40 - LOG_LEVEL_INFO (default for DEBUG=1) 82 - 50 - LOG_LEVEL_VERBOSE 83 84- USE_COHERENT_MEM 85 86 This flag determines whether to include the coherent memory region in the 87 BL memory map or not. Enabled by default. 88 89- LLC_ENABLE 90 91 Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``). 92 93- LLC_SRAM 94 95 Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used 96 by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows 97 for SRAM address range at BL31 execution stage with window target set to DRAM-0. 98 When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM. 99 There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n. 100 Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y. 101 102- MARVELL_SECURE_BOOT 103 104 Build trusted(=1)/non trusted(=0) image, default is non trusted. 105 This parameter is used only for ``mrvl_flash`` and ``mrvl_uart`` targets. 106 107- MV_DDR_PATH 108 109 This parameter is required for ``mrvl_flash`` and ``mrvl_uart`` targets. 110 For A7K/8K/CN913x it is used for BLE build and for Armada37x0 it used 111 for ddr_tool build. 112 113 Specify path to the full checkout of Marvell mv-ddr-marvell git 114 repository. Checkout must contain also .git subdirectory because 115 mv-ddr build process calls git commands. 116 117 Do not remove any parts of git checkout becuase build process and other 118 applications need them for correct building and version determination. 119 120 121CN913x specific build options: 122 123- CP_NUM 124 125 Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted, 126 the build uses the default number of CPs, which is a number of embedded CPs inside the 127 package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC 128 family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid 129 values with CP_NUM are in a range of 1 to 3. 130 131 132A7K/8K/CN913x specific build options: 133 134- BLE_PATH 135 136 Points to BLE (Binary ROM extension) sources folder. 137 The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble`` 138 which uses TF-A in-tree BLE implementation. 139 140 141Armada37x0 specific build options: 142 143- CM3_SYSTEM_RESET 144 145 When ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will be used for system reset. 146 147 TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the 148 Cortex-M3 secure coprocessor. 149 The firmware running in the coprocessor must either implement this functionality or 150 ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell 151 repository). If this option is enabled but the firmware does not support this command, 152 an error message will be printed prior trying to reboot via the usual way. 153 154 This option is needed on Turris MOX as a workaround to a HW bug which causes reset to 155 sometime hang the board. 156 157- A3720_DB_PM_WAKEUP_SRC 158 159 For Armada 3720 Development Board only, when ``A3720_DB_PM_WAKEUP_SRC=1``, 160 TF-A will setup PM wake up src configuration. This option is disabled by default. 161 162 163Armada37x0 specific build options for ``mrvl_flash`` and ``mrvl_uart`` targets: 164 165- DDR_TOPOLOGY 166 167 The DDR topology map index/name, default is 0. 168 169 Supported Options: 170 - 0 - DDR3 1CS 512MB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 171 - 1 - DDR4 1CS 512MB (DB-88F3720-DDR4-Modular) 172 - 2 - DDR3 2CS 1GB (EspressoBin V3-V5) 173 - 3 - DDR4 2CS 4GB (DB-88F3720-DDR4-Modular) 174 - 4 - DDR3 1CS 1GB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 175 - 5 - DDR4 1CS 1GB (EspressoBin V7, EspressoBin-Ultra) 176 - 6 - DDR4 2CS 2GB (EspressoBin V7) 177 - 7 - DDR3 2CS 2GB (EspressoBin V3-V5) 178 - CUST - CUSTOMER BOARD (Customer board settings) 179 180- CLOCKSPRESET 181 182 The clock tree configuration preset including CPU and DDR frequency, 183 default is CPU_800_DDR_800. 184 185 - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz 186 - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz 187 - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz 188 - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz 189 190 Look at Armada37x0 chip package marking on board to identify correct CPU frequency. 191 The last line on package marking (next line after the 88F37x0 line) should contain: 192 193 - C080 or I080 - chip with 800 MHz CPU - use ``CLOCKSPRESET=CPU_800_DDR_800`` 194 - C100 or I100 - chip with 1000 MHz CPU - use ``CLOCKSPRESET=CPU_1000_DDR_800`` 195 - C120 - chip with 1200 MHz CPU - use ``CLOCKSPRESET=CPU_1200_DDR_750`` 196 197- BOOTDEV 198 199 The flash boot device, default is ``SPINOR``. 200 201 Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``: 202 203 - SPINOR - SPI NOR flash boot 204 - SPINAND - SPI NAND flash boot 205 - EMMCNORM - eMMC Download Mode 206 207 Download boot loader or program code from eMMC flash into CM3 or CA53 208 Requires full initialization and command sequence 209 210 - SATA - SATA device boot 211 212 Image needs to be stored at disk LBA 0 or at disk partition with 213 MBR type 0x4d (ASCII 'M' as in Marvell) or at disk partition with 214 GPT name ``MARVELL BOOT PARTITION``. 215 216- PARTNUM 217 218 The boot partition number, default is 0. 219 220 To boot from eMMC, the value should be aligned with the parameter in 221 U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is 222 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot 223 build instructions. 224 225- WTMI_IMG 226 227 The path of the binary can point to an image which 228 does nothing, an image which supports EFUSE or a customized CM3 firmware 229 binary. The default image is ``fuse.bin`` that built from sources in WTP 230 folder, which is the next option. If the default image is OK, then this 231 option should be skipped. 232 233 Please note that this is not a full WTMI image, just a main loop without 234 hardware initialization code. Final WTMI image is built from this WTMI_IMG 235 binary and sys-init code from the WTP directory which sets DDR and CPU 236 clocks according to DDR_TOPOLOGY and CLOCKSPRESET options. 237 238 CZ.NIC as part of Turris project released free and open source WTMI 239 application firmware ``wtmi_app.bin`` for all Armada 3720 devices. 240 This firmware includes additional features like access to Hardware 241 Random Number Generator of Armada 3720 SoC which original Marvell's 242 ``fuse.bin`` image does not have. 243 244 CZ.NIC's Armada 3720 Secure Firmware is available at website: 245 246 https://gitlab.nic.cz/turris/mox-boot-builder/ 247 248- WTP 249 250 Specify path to the full checkout of Marvell A3700-utils-marvell git 251 repository. Checkout must contain also .git subdirectory because WTP 252 build process calls git commands. 253 254 WTP build process uses also Marvell mv-ddr-marvell git repository 255 specified in MV_DDR_PATH option. 256 257 Do not remove any parts of git checkout becuase build process and other 258 applications need them for correct building and version determination. 259 260- CRYPTOPP_PATH 261 262 Use this parameter to point to Crypto++ source code 263 directory. If this option is specified then Crypto++ source code in 264 CRYPTOPP_PATH directory will be automatically compiled. Crypto++ library 265 is required for building WTP image tool. Either CRYPTOPP_PATH or 266 CRYPTOPP_LIBDIR with CRYPTOPP_INCDIR needs to be specified for Armada37x0. 267 268- CRYPTOPP_LIBDIR 269 270 Use this parameter to point to the directory with 271 compiled Crypto++ library. By default it points to the CRYPTOPP_PATH. 272 273- CRYPTOPP_INCDIR 274 275 Use this parameter to point to the directory with 276 header files of Crypto++ library. By default it points to the CRYPTOPP_PATH. 277 278 279For example, in order to build the image in debug mode with log level up to 'notice' level run 280 281.. code:: shell 282 283 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash 284 285And if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level, 286the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS, 287the image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command 288line is as following 289 290.. code:: shell 291 292 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \ 293 MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \ 294 MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \ 295 CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \ 296 all fip mrvl_bootimage mrvl_flash mrvl_uart 297 298To build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command: 299 300.. code:: shell 301 302 > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \ 303 CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage 304 305Here is full example how to build production release of Marvell firmware image (concatenated 306binary of Marvell's A3720 sys-init, CZ.NIC's Armada 3720 Secure Firmware, TF-A and U-Boot) for 307EspressoBin board (PLAT=a3700) with 1GHz CPU (CLOCKSPRESET=CPU_1000_DDR_800) and 3081GB DDR4 RAM (DDR_TOPOLOGY=5): 309 310.. code:: shell 311 312 > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git 313 > git clone https://source.denx.de/u-boot/u-boot.git 314 > git clone https://github.com/weidai11/cryptopp.git 315 > git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 316 > git clone https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git 317 > git clone https://gitlab.nic.cz/turris/mox-boot-builder.git 318 > make -C u-boot CROSS_COMPILE=aarch64-linux-gnu- mvebu_espressobin-88f3720_defconfig u-boot.bin 319 > make -C mox-boot-builder CROSS_CM3=arm-linux-gnueabi- wtmi_app.bin 320 > make -C trusted-firmware-a CROSS_COMPILE=aarch64-linux-gnu- CROSS_CM3=arm-linux-gnueabi- \ 321 USE_COHERENT_MEM=0 PLAT=a3700 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 \ 322 MV_DDR_PATH=$PWD/mv-ddr-marvell/ WTP=$PWD/A3700-utils-marvell/ \ 323 CRYPTOPP_PATH=$PWD/cryptopp/ BL33=$PWD/u-boot/u-boot.bin \ 324 WTMI_IMG=$PWD/mox-boot-builder/wtmi_app.bin FIP_ALIGN=0x100 mrvl_flash 325 326Produced Marvell firmware flash image: ``trusted-firmware-a/build/a3700/release/flash-image.bin`` 327 328Special Build Flags 329-------------------- 330 331- PLAT_RECOVERY_IMAGE_ENABLE 332 When set this option to enable secondary recovery function when build atf. 333 In order to build UART recovery image this operation should be disabled for 334 A7K/8K/CN913x because of hardware limitation (boot from secondary image 335 can interrupt UART recovery process). This MACRO definition is set in 336 ``plat/marvell/armada/a8k/common/include/platform_def.h`` file. 337 338- DDR32 339 In order to work in 32bit DDR, instead of the default 64bit ECC DDR, 340 this flag should be set to 1. 341 342For more information about build options, please refer to the 343:ref:`Build Options` document. 344 345 346Build output 347------------ 348Marvell's TF-A compilation generates 8 files: 349 350 - ble.bin - BLe image (not available for Armada37x0) 351 - bl1.bin - BL1 image 352 - bl2.bin - BL2 image 353 - bl31.bin - BL31 image 354 - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images) 355 - boot-image.bin - TF-A image (contains BL1 and FIP images) 356 - flash-image.bin - Flashable Marvell firmware image. For Armada37x0 it 357 contains TIM, WTMI and boot-image.bin images. For other platforms it contains 358 BLe and boot-image.bin images. Should be placed on the boot flash/device. 359 - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images 360 for booting via UART. Could be loaded via Marvell's WtpDownload tool from 361 A3700-utils-marvell repository. 362 363Additional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file. Target 364``mrvl_flash`` produce final ``flash-image.bin`` file and target ``mrvl_uart`` 365produce ``uart-images.tgz.bin`` file. 366 367 368Tools and external components installation 369------------------------------------------ 370 371Armada37x0 Builds require installation of additional components 372~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 373 374(1) ARM cross compiler capable of building images for the service CPU (CM3). 375 This component is usually included in the Linux host packages. 376 On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed 377 using the following command 378 379 .. code:: shell 380 381 > sudo apt-get install gcc-arm-linux-gnueabi 382 383 Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be 384 overwritten using the environment variable ``CROSS_CM3``. 385 Example for BASH shell 386 387 .. code:: shell 388 389 > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi 390 391(2) DDR initialization library sources (mv_ddr) available at the following repository 392 (use the "master" branch): 393 394 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 395 396(3) Armada3700 tools available at the following repository 397 (use the "master" branch): 398 399 https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git 400 401(4) Crypto++ library available at the following repository: 402 403 https://github.com/weidai11/cryptopp.git 404 405(5) Optional CZ.NIC's Armada 3720 Secure Firmware: 406 407 https://gitlab.nic.cz/turris/mox-boot-builder.git 408 409Armada70x0 and Armada80x0 Builds require installation of an additional component 410~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 411 412(1) DDR initialization library sources (mv_ddr) available at the following repository 413 (use the "master" branch): 414 415 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 416