Merge "feat(tc0): add bootargs node" into integration

refactor(plat/nxp/lx216x): refine variable definition

This patch will make BL2_BASE to be hex valaue but
not a shell command.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iebb86a0b9bc8

refactor(plat/nxp/lx216x): refine variable definition

This patch will make BL2_BASE to be hex valaue but
not a shell command.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iebb86a0b9bc8cab1676bd8e898cf4a1b6d16f472

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refactor(plat/nxp/lx216x): use common make variables

Some build variables have already defined in common
make helper file, use them directly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-I

refactor(plat/nxp/lx216x): use common make variables

Some build variables have already defined in common
make helper file, use them directly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I7fe6331160bfdf315924d4498d78b0a399eb2e89

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Merge "errata: workaround for Cortex A78 errata 1821534" into integration

errata: workaround for Cortex A78 errata 1821534

Cortex A78 erratum 1821534 is a Cat B erratum present in r0p0 and
r1p0 of the A78 processor core, it is fixed in r1p1.

SDEN can be found here:
https

errata: workaround for Cortex A78 errata 1821534

Cortex A78 erratum 1821534 is a Cat B erratum present in r0p0 and
r1p0 of the A78 processor core, it is fixed in r1p1.

SDEN can be found here:
https://documentation-service.arm.com/static/603e3733492bde1625aa8780

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I71057c4b9625cd9edc1a06946b453cf16ae5ea2c

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fix(rockchip/rk3399): fix dram section placement

To quote jwerner in T925:
"The __sramdata in the declaration is a mistake, the correct target
section for that global needs to be .pmusram.data. This

fix(rockchip/rk3399): fix dram section placement

To quote jwerner in T925:
"The __sramdata in the declaration is a mistake, the correct target
section for that global needs to be .pmusram.data. This used to be
in .sram.data once upon a time but then the suspend.c stuff got added
and required it to be moved to PMUSRAM. I guess they forgot to update
that part in the declaration and since the old GCC seemed to silently
prefer the attribute in the definition, nobody noticed."

This fixes building with gcc 11.

fix #T925

Change-Id: I2b91542277c95cf487eaa1344927294d5d1b8f2b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>

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errata: workaround for Cortex A77 errata 1791578

Cortex A77 erratum 1791578 is a Cat B erratum present in r0p0, r1p0,
and r1p1 of the A77 processor core, it is still open.

SDEN can be found here:
h

errata: workaround for Cortex A77 errata 1791578

Cortex A77 erratum 1791578 is a Cat B erratum present in r0p0, r1p0,
and r1p1 of the A77 processor core, it is still open.

SDEN can be found here:
https://documentation-service.arm.com/static/60a63a3c982fc7708ac1c8b1

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ib4b963144f880002de308def12744b982d3df868

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Merge "refactor(dt-bindings): align irq bindings with kernel" into integration

refactor(aarch64): remove `FEAT_BTI` architecture check

BTI instructions are a part of the NOP space in earlier architecture
versions, so it's not inherently incorrect to enable BTI code
or instruct

refactor(aarch64): remove `FEAT_BTI` architecture check

BTI instructions are a part of the NOP space in earlier architecture
versions, so it's not inherently incorrect to enable BTI code
or instructions even if the target architecture does not support them.

This change reduces our reliance on architecture versions when checking
for features.

Change-Id: I79f884eec3d65978c61e72e4268021040fd6c96e
Signed-off-by: Chris Kay <chris.kay@arm.com>

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fix(tools/stm32image): improve the tool

Add parameters to fill header version:
Two new options are added (m and n) to fill header version major and minor.
The default is v1.0 (major = 1, minor = 0)

fix(tools/stm32image): improve the tool

Add parameters to fill header version:
Two new options are added (m and n) to fill header version major and minor.
The default is v1.0 (major = 1, minor = 0)

Fix image header on big endian hosts:
Three header fields are not properly converted to little endian
before assignment, resulting in incorrect header while executing
stm32image on big endian hosts.

Convert the value of the header fields version_number,
image_checksum and edcsa_algorithm to little endian before the
assignment.

Don't force the base of strtol, since it's able to select the base
automatically depending on the prefix of the value.
This does not breaks the current build script that extracts the
addresses, including the 0x prefix, from the map file.
This change helps using stm32image in shell scripts where the
addresses can be computed using the shell arithmetic expansion
"$((...))", that produces a value in base decimal.

The variable stm32image_header is declared with global visibility
but is use in one function only, move it as local variable in the function.

Fix error message on destination file:
The error message on mmap() failure of destination file reports
incorrectly information about the source file.
Change the error message to match the file that causes the error.

Change-Id: Iebc8c915297306845b3847b32f9516443a515c97
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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fix(plat/st): correct IO compensation disabling

In stm32mp1_syscfg_disable_io_compensation(), to disable the IO
compensation cell, we have to set the corresponding bit in
SYSCFG_CMPENCLRR register,

fix(plat/st): correct IO compensation disabling

In stm32mp1_syscfg_disable_io_compensation(), to disable the IO
compensation cell, we have to set the corresponding bit in
SYSCFG_CMPENCLRR register, instead of clearing the bit in SETR register.

Change-Id: I510a50451f8afb9e98c24e1ea84efbf73a39e6b4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(drivers/mtd): macronix quad enable bit issue

Invert test logic on the status register control to
fix issue when the bit SR_QUAD_EN_MX is not set.

Change-Id: I8b2f140219f124336bf96462abf9d9445d0

fix(drivers/mtd): macronix quad enable bit issue

Invert test logic on the status register control to
fix issue when the bit SR_QUAD_EN_MX is not set.

Change-Id: I8b2f140219f124336bf96462abf9d9445d0308bc
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(drivers/mtd): fix MISRA issues and logic improvement

Fix MISRA issues and invert the spi_nor_ready status
to improve readability.
Remove an unneeded variable initialization.

Change-Id: I25a97fb

fix(drivers/mtd): fix MISRA issues and logic improvement

Fix MISRA issues and invert the spi_nor_ready status
to improve readability.
Remove an unneeded variable initialization.

Change-Id: I25a97fbd6c4389156b4f077b986019fa7c30a457
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(plat/st): add STM32IMAGE_SRC

The dependency on this macro was added by patch [1]. But the macro
itself was forgotten in the patch.

[1] 128e0b3e2e0 ("stm32mp1: update rules for stm32image tool"

fix(plat/st): add STM32IMAGE_SRC

The dependency on this macro was added by patch [1]. But the macro
itself was forgotten in the patch.

[1] 128e0b3e2e0 ("stm32mp1: update rules for stm32image tool")

Change-Id: I49219e1e13828b97b95f404983da33ef4567fe23
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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fix(plat/st): correct BSEC error code management

BSEC services should return SMC error codes as other IDs (defined in
stm32mp1_smc.h) and not BSEC driver ones. So that non-secure caller
is able to t

fix(plat/st): correct BSEC error code management

BSEC services should return SMC error codes as other IDs (defined in
stm32mp1_smc.h) and not BSEC driver ones. So that non-secure caller
is able to treat them correctly.

In global SMC handler, unknown ID should also return a value from this
definition list, and not the generic one, which seems not well adapted
for our needs.

Two unsigned values initializations are also changed from 0 to 0U.

Change-Id: Ib6fd3866a748cefad1d13d48f7be38241621023e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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fix(drivers/st/pmic): missing error check

In pmic_operate(), "regulators" node value must be checked before
entering in the fdt_for_each_subnode loop.

Change-Id: I1460cd24ec56ec47ab644f396b71b92973

fix(drivers/st/pmic): missing error check

In pmic_operate(), "regulators" node value must be checked before
entering in the fdt_for_each_subnode loop.

Change-Id: I1460cd24ec56ec47ab644f396b71b92973e75fb4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(drivers/st/pmic): initialize i2c_state

Make sure that i2c->i2c_state is correctly initialized
with I2C_STATE_RESET value this avoid hi2c->lock to not
be set to 0 when calling stm32_i2c_init duri

fix(drivers/st/pmic): initialize i2c_state

Make sure that i2c->i2c_state is correctly initialized
with I2C_STATE_RESET value this avoid hi2c->lock to not
be set to 0 when calling stm32_i2c_init during platform
suspend/resume operations.

Change-Id: I3b4c1f9115589325eb256789a1764c322741db7d
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(drivers/st/clk): use correct return value

The function stm32mp1_clk_init() returns an int. Return a negative
error value if the device tree is not found.

Change-Id: I422d5fea46c4d63d55a5b62e1db

fix(drivers/st/clk): use correct return value

The function stm32mp1_clk_init() returns an int. Return a negative
error value if the device tree is not found.

Change-Id: I422d5fea46c4d63d55a5b62e1db154c1f53f41b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(tc0): add bootargs node

We will maintain the kernel command line here instead of in U-Boot.

Signed-off-by: Anders Dellien <anders.dellien@arm.com>
Change-Id: I6011306cbaf47717c061f542e18000528

feat(tc0): add bootargs node

We will maintain the kernel command line here instead of in U-Boot.

Signed-off-by: Anders Dellien <anders.dellien@arm.com>
Change-Id: I6011306cbaf47717c061f542e180005281695516

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Merge "feat(spmd): add support for FFA_SPM_ID_GET" into integration

Merge changes from topic "io_stm32image" into integration

* changes:
fix(io_stm32image): invalidate cache on local buf
refactor(io_stm32image): add header size variable
fix(io_stm32image): uni

Merge changes from topic "io_stm32image" into integration

* changes:
fix(io_stm32image): invalidate cache on local buf
refactor(io_stm32image): add header size variable
fix(io_stm32image): uninitialized variable warning

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Merge changes from topic "imx8m-sdei" into integration

* changes:
feat(plat/imx8m): add sdei support for i.MX8MP
feat(plat/imx8m): add sdei support for i.MX8MN

Merge "refactor(plat/zynqmp): optimize the code to save some space" into integration

Merge "refactor(plat/st): check boot device only for BL2" into integration

Merge "feat(plat/imx8m): add system_reset2 implementation" into integration