| 56c052d3 | 31-Dec-2022 |
Demi Marie Obenour <demiobenour@gmail.com> |
fix(el3-spmc): validate descriptor headers
This avoids out-of-bounds reads later.
Change-Id: Iee4245a393f1fde63d8ebada25ea2568cf984871 Signed-off-by: Demi Marie Obenour <demiobenour@gmail.com> |
| 52d8d506 | 31-Dec-2022 |
Demi Marie Obenour <demiobenour@gmail.com> |
fix(el3-spmc): use version-dependent minimum descriptor length
A v1.1 descriptor has a minimum length exceeding that of a v1.0 descriptor.
Change-Id: I06265d58f53eccb0d39927fe9ff396b73735df97 Signe
fix(el3-spmc): use version-dependent minimum descriptor length
A v1.1 descriptor has a minimum length exceeding that of a v1.0 descriptor.
Change-Id: I06265d58f53eccb0d39927fe9ff396b73735df97 Signed-off-by: Demi Marie Obenour <demiobenour@gmail.com>
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| eef12e26 | 31-Dec-2022 |
Demi Marie Obenour <demiobenour@gmail.com> |
refactor(el3-spmc): check emad_count offset
Subsequent code will assume that it version-independent, so check it with a CASSERT.
Change-Id: I233b51ef700103f1a0789d5608e3b02c96d0eeb7 Signed-off-by:
refactor(el3-spmc): check emad_count offset
Subsequent code will assume that it version-independent, so check it with a CASSERT.
Change-Id: I233b51ef700103f1a0789d5608e3b02c96d0eeb7 Signed-off-by: Demi Marie Obenour <demiobenour@gmail.com>
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| 73ede2bf | 03-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I92826714,I9431f9d1 into integration
* changes: build(psci): move `runtime_errata.S` to PSCI build: allow BL-specific includes/definitions |
| 11ccf5d9 | 28-Mar-2023 |
Chris Kay <chris.kay@arm.com> |
build(psci): move `runtime_errata.S` to PSCI
Move the runtime errata source file into the PSCI library, as PSCI is the only component directly dependent on it, and it doesn't require internal access
build(psci): move `runtime_errata.S` to PSCI
Move the runtime errata source file into the PSCI library, as PSCI is the only component directly dependent on it, and it doesn't require internal access to the CPUs library.
Change-Id: I92826714d49b1b0131f62c158543b4c167ab9aa8 Signed-off-by: Chris Kay <chris.kay@arm.com>
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| a123cb14 | 22-Mar-2023 |
Chris Kay <chris.kay@arm.com> |
build: allow BL-specific includes/definitions
This change introduces the `BLx_INCLUDE_DIRS` and `BLx_DEFINES` Makefile variables, which can be used to append include directories and preprocessor def
build: allow BL-specific includes/definitions
This change introduces the `BLx_INCLUDE_DIRS` and `BLx_DEFINES` Makefile variables, which can be used to append include directories and preprocessor definitions to specific images created using the `MAKE_BL` Makefile macro.
Change-Id: I9431f9d1cbde5b0b2624d9ce128a4f043c74c87f Signed-off-by: Chris Kay <chris.kay@arm.com>
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| f50107d3 | 03-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I9d06e0ee,I6980e84f into integration
* changes: feat(tegra): implement 'pwr_domain_off_early' handler feat(psci): introduce 'pwr_domain_off_early' hook |
| 4d32f913 | 24-Apr-2023 |
Yann Gautier <yann.gautier@st.com> |
fix(build): add a default value for INVERTED_MEMMAP
It is needed to check the validity of boolean flags with the updated macro assert_boolean.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Chan
fix(build): add a default value for INVERTED_MEMMAP
It is needed to check the validity of boolean flags with the updated macro assert_boolean.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I185beb55606a4ca435d2fee2092fc61725859aa1
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| 115ab638 | 02-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
fix(a5ds): add default value for ARM_DISABLE_TRUSTED_WDOG
With introduction of check on boolean flags, it should be ensured that each boolean flag has default value provided by platform.
Signed-off
fix(a5ds): add default value for ARM_DISABLE_TRUSTED_WDOG
With introduction of check on boolean flags, it should be ensured that each boolean flag has default value provided by platform.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ia92c3dded842e14099b4a7667569605d7066a8f9
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| 6a187a00 | 03-May-2023 |
Lionel Debieve <lionel.debieve@foss.st.com> |
fix(st-crypto): move flag control into source code
Remove the control from the include file to avoid compilation issue. Add the check in the source code instead.
Signed-off-by: Lionel Debieve <lion
fix(st-crypto): move flag control into source code
Remove the control from the include file to avoid compilation issue. Add the check in the source code instead.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Change-Id: I533f829607f76389399a3e8dbc3c6095278562ab
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| e0e2d64f | 24-Apr-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(stm32mp1): always define PKA algos flags
The flags to set PKA algo are set to 0 when TRUSTED_BOARD_BOOT is not set.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ib70a2bc514
fix(stm32mp1): always define PKA algos flags
The flags to set PKA algo are set to 0 when TRUSTED_BOARD_BOOT is not set.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ib70a2bc51451a2047d7a50a8307e9063d4a2a0ee
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| 231a0adb | 24-Apr-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(stm32mp1): remove boolean check on PLAT_TBBR_IMG_DEF
This flag just needs to be defined, and does not need to have a boolean value. Remove it from the assert_booleans check.
Signed-off-by: Yann
fix(stm32mp1): remove boolean check on PLAT_TBBR_IMG_DEF
This flag just needs to be defined, and does not need to have a boolean value. Remove it from the assert_booleans check.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I4e4c9ae1e5003ca2cf7c0c0e31d1561d032937c8
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| 7f28179a | 16-Mar-2023 |
J-Alves <joao.alves@arm.com> |
feat(fvp): define ns memory in the SPMC manifest
The SPMC (Hafnium) looks for secure and non-secure ranges in its manifest. Those relate with ranges that can be used by SPs in their FF-A manifests.
feat(fvp): define ns memory in the SPMC manifest
The SPMC (Hafnium) looks for secure and non-secure ranges in its manifest. Those relate with ranges that can be used by SPs in their FF-A manifests. The NS memory that is not used by SPs will be assigned to the NWd, for it to share memory with SPs as needed. Thus, this limits the memory the NWd can share with SPs, to prevent NWD VMs from sharing memory that belongs to other critical components.
Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: Iad03eb138a57068fbb18c53141bdf6bf9c171b28
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| 837fc96c | 02-May-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(xilinx): sync copyright format" into integration |
| fecd243c | 02-May-2023 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "refactor(cpus): use BIT macro in a consistent manner" into integration |
| d494b0ef | 02-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(el3-runtime): handle traps for IMPDEF registers accesses" into integration |
| fda676d3 | 02-May-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "build: deprecate Arm rde1edge" into integration |
| 607388df | 02-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(sme): disable SME for SPD=spmd" into integration |
| 49246670 | 02-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes Ia1142b31,I424f1cde into integration
* changes: fix(tc): enable the execution of both platform tests fix(tc): update the name of mbedtls config header |
| c89fdb4a | 02-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "refactor(fiptool): move plat_fiptool.mk to tools" into integration |
| 79c310f0 | 02-May-2023 |
Varun Wadekar <vwadekar@nvidia.com> |
Merge "fix(tegra): remove dependency on CPU registers to get boot parameters" into integration |
| e23d442d | 02-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "docs(measured-boot): update the build command" into integration |
| e6017291 | 03-Mar-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
docs(spm): support for handling Group0 interrupts
Please refer the doc update.
Change-Id: Ib79fae1296bc28fa9bd0cd79609d6153bb57519b Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
| f0b64e50 | 02-Mar-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
feat(spmd): introduce platform handler for Group0 interrupt
This patch introduces a handler for FVP platform to triage Group0 secure interrupts. Currently, it is empty but serves as a placeholder fo
feat(spmd): introduce platform handler for Group0 interrupt
This patch introduces a handler for FVP platform to triage Group0 secure interrupts. Currently, it is empty but serves as a placeholder for future Group0 interrupt sources.
Moreover, this patch also provides a dummy implementation of the above mentioned platform hook for QEMU, corstone100, n1sdp and hikey960 ports.
Change-Id: I01d3451408f47ac313b0af74046cce89f89b85bb Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 6671b3d8 | 02-Mar-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
feat(spmd): add support for FFA_EL3_INTR_HANDLE_32 ABI
When Group0 Secure interrupts in secure world get trapped to S-EL2 SPMC, FFA_EL3_INTR_HANDLE ABI is invoked by SPMC to delegate interrupt handl
feat(spmd): add support for FFA_EL3_INTR_HANDLE_32 ABI
When Group0 Secure interrupts in secure world get trapped to S-EL2 SPMC, FFA_EL3_INTR_HANDLE ABI is invoked by SPMC to delegate interrupt handling to EL3 firmware (i.e., SPMD).
SPMD further delegates to platform handler which successfully handles the Group0 secure interrupt before returning control to SPMC.
Change-Id: I8cc0fec20803b96c81582910ad2668e38b167fb8 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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