Merge changes from topic "master" into integration

* changes:
fix(tc): rename macro to match PSA spec
fix(tc): Correct return type

feat(versal-net): ddr address reservation in dtb at runtime

When the TF-A is placed in DDR memory range, the DDR memory range
needs to be explicitly reserved in the default device tree.

A new build

feat(versal-net): ddr address reservation in dtb at runtime

When the TF-A is placed in DDR memory range, the DDR memory range
needs to be explicitly reserved in the default device tree.

A new build time parameter, XILINX_OF_BOARD_DTB_ADDR, is introduced.
The TF-A will reserve the DDR memory only when a valid DTB address
is provided to XILINX_OF_BOARD_DTB_ADDR during build.

Now the user has options, either manually reserve the desired DDR
address range for TF-A in device tree or let TF-A access and modify
the device tree, to reserve the DDR address range, in runtime using
the build parameter.

Change-Id: I45a5d9a8343ea8a19ea014a70023731de94d061a
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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feat(versal): ddr address reservation in dtb at runtime

When the TF-A is placed in DDR memory range, the DDR memory range
needs to be explicitly reserved in the default device tree.

A new build tim

feat(versal): ddr address reservation in dtb at runtime

When the TF-A is placed in DDR memory range, the DDR memory range
needs to be explicitly reserved in the default device tree.

A new build time parameter, XILINX_OF_BOARD_DTB_ADDR, is introduced.
The TF-A will reserve the DDR memory only when a valid DTB address
is provided to XILINX_OF_BOARD_DTB_ADDR during build.

Now the user has options, either manually reserve the desired DDR
address range for TF-A in device tree or let TF-A access and modify
the device tree, to reserve the DDR address range, in runtime using
the build parameter.

Change-Id: I4442a90e1cab5a3a115f4eeb8a7e09e247189ff0
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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Merge "docs(morello): update the boot sequence according to the TBBR boot flow" into integration

Merge "fix(intel): resolved coverity checking" into integration

docs(morello): update the boot sequence according to the TBBR boot flow

The boot sequence mentioned in the documentation referred to an older
boot flow. This patch updates the boot sequence to the T

docs(morello): update the boot sequence according to the TBBR boot flow

The boot sequence mentioned in the documentation referred to an older
boot flow. This patch updates the boot sequence to the TBBR boot flow
that is currently being followed.

Signed-off-by: Deepthi Peter <deepthi.peter@arm.com>
Change-Id: I183458cea6d43dcf8acba2e0422920ab5541fdfc

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Merge changes from topic "psci-osi" into integration

* changes:
fix(sc7280): update system suspend in OS-initiated mode
fix(fvp): update system suspend in OS-initiated mode

fix(sc7280): update system suspend in OS-initiated mode

This patch fixes system suspend in OS-initiated mode by setting the
value of `last_at_pwrlvl` in the `psci_power_state_t` object to
`PLAT_MAX_

fix(sc7280): update system suspend in OS-initiated mode

This patch fixes system suspend in OS-initiated mode by setting the
value of `last_at_pwrlvl` in the `psci_power_state_t` object to
`PLAT_MAX_PWR_LVL`, which otherwise would result in undefined behavior.

This is conditionally compiled into the build depending on the value of
the `PSCI_OS_INIT_MODE` build option.

Change-Id: Ib9ff606b7eebd8a8224891a0d239a4e13311fe2a
Signed-off-by: Wing Li <wingers@google.com>

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fix(fvp): update system suspend in OS-initiated mode

This patch fixes system suspend in OS-initiated mode by setting the
value of `last_at_pwrlvl` in the `psci_power_state_t` object to
`PLAT_MAX_PWR

fix(fvp): update system suspend in OS-initiated mode

This patch fixes system suspend in OS-initiated mode by setting the
value of `last_at_pwrlvl` in the `psci_power_state_t` object to
`PLAT_MAX_PWR_LVL`, which otherwise would result in undefined behavior.

This is conditionally compiled into the build depending on the value of
the `PSCI_OS_INIT_MODE` build option.

Change-Id: Ia0fb1e68af9320370325642b17c4569e9580aa3a
Signed-off-by: Wing Li <wingers@google.com>

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Merge changes from topic "kc/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A75 to use cpu helpers
refactor(cpus): convert the Cortex-A75 to use the errata frame

Merge changes from topic "kc/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A75 to use cpu helpers
refactor(cpus): convert the Cortex-A75 to use the errata framework

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fix(intel): resolved coverity checking

Coverity checking fix. Resolved unused value, deadcode and uninit.

1. CID: 395326
2. CID: 395327
3. CID: 395328
4. CID: 395329
5. CID: 395330

Signed-off

fix(intel): resolved coverity checking

Coverity checking fix. Resolved unused value, deadcode and uninit.

1. CID: 395326
2. CID: 395327
3. CID: 395328
4. CID: 395329
5. CID: 395330

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I86b8af28dc345542b142ce53e1935bb855888238

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Merge "fix(rcar): add mandatory fields in 'reserved-memory' node" into integration

Merge changes from topic "mb/mb-design" into integration

* changes:
docs: remove redundant Measured Boot interface info
docs: add Measured Boot design

build(fpga): remove a710 from fpga build

Currently we have a large series of errata_refactor patches pending
and they are all failing on arm_fpga build when we add errata_framework.

Errata framewor

build(fpga): remove a710 from fpga build

Currently we have a large series of errata_refactor patches pending
and they are all failing on arm_fpga build when we add errata_framework.

Errata framework can cause the size to grow and thus causing build
failure on bl31 size. This as of today is blocking us from
merging most of our changes as it will introduce a CI failure.

As an workaround we try to just reduce the arm_fpga build by a710
platform, we have a715 and a720 which should be ok I think.

Once everyone are available for further discussion we could revert this
change back and discuss further whats the right approach.

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I96a821e10aaecf04db7407fb2df38012839bfb94

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Merge "docs: add guidelines for abandoning patches" into integration

Merge changes from topic "agilex5" into integration

* changes:
feat(intel): platform enablement for Agilex5 SoC FPGA
feat(intel): ccu driver for Agilex5 SoC FPGA
feat(intel): vab support for A

Merge changes from topic "agilex5" into integration

* changes:
feat(intel): platform enablement for Agilex5 SoC FPGA
feat(intel): ccu driver for Agilex5 SoC FPGA
feat(intel): vab support for Agilex5 SoC FPGA
feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
feat(intel): ddr driver for Agilex5 SoC FPGA
feat(intel): power manager for Agilex5 SoC FPGA
feat(intel): cold/warm reset and smp support for Agilex5 SoC FPGA
feat(intel): reset manager support for Agilex5 SoC FPGA
feat(intel): mailbox and SMC support for Agilex5 SoC FPGA
feat(intel): system manager support for Agilex5 SoC FPGA
feat(intel): memory controller support for Agilex5 SoC FPGA
feat(intel): clock manager support for Agilex5 SoC FPGA
feat(intel): mmc support for Agilex5 SoC FPGA
feat(intel): uart support for Agilex5 SoC FPGA
feat(intel): pinmux, peripheral and Handoff support for Agilex5 SoC FPGA

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Merge changes from topic "imx93_basic_support" into integration

* changes:
docs(imx9): add imx93 platform
feat(imx93): add OPTEE support
feat(imx93): protect OPTEE memory to secure access only

Merge changes from topic "imx93_basic_support" into integration

* changes:
docs(imx9): add imx93 platform
feat(imx93): add OPTEE support
feat(imx93): protect OPTEE memory to secure access only
feat(imx93): add cpuidle and basic suspend support
feat(imx93): add reset & poweroff support
feat(imx93): allow SoC masters access to system TCM
feat(imx93): update the ocram trdc config for did10
feat(imx93): add the basic support
feat(imx93): add the trdc driver
build(changelog): add new scopes for nxp imx platform

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Merge "feat(qemu): add "neoverse-v1" cpu support" into integration

docs: remove redundant Measured Boot interface info

A separate design document for Measured Boot covers the porting
guidelines for the Measured Boot interfaces. As a result,
the Measured Boot interf

docs: remove redundant Measured Boot interface info

A separate design document for Measured Boot covers the porting
guidelines for the Measured Boot interfaces. As a result,
the Measured Boot interfaces have been removed from the porting
guide and a link to the Measured Boot design document has been
provided.

Change-Id: Ia6bd2620d830aea6aececab4af7e10a6d737f025
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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docs: add Measured Boot design

Added design document for Measured Boot implementation in
TF-A.

Change-Id: I25b57ec555b289eb6bbf0a6aae014d7bf6d152fd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe

docs: add Measured Boot design

Added design document for Measured Boot implementation in
TF-A.

Change-Id: I25b57ec555b289eb6bbf0a6aae014d7bf6d152fd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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docs: add guidelines for abandoning patches

The code review guidelines have been updated to explain when
patches that do not receive a response to the review comments
will be abandoned.

Change-Id:

docs: add guidelines for abandoning patches

The code review guidelines have been updated to explain when
patches that do not receive a response to the review comments
will be abandoned.

Change-Id: I60539e16ca41245cf1b352f24557be1b3c67c367
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "feat(build): march option selection" into integration

Merge changes from topic "mb/mb-rss-refactor" into integration

* changes:
refactor(tc): update RSS driver inteface calls
refactor(fvp): update RSS driver inteface calls
refactor(rss): make RSS

Merge changes from topic "mb/mb-rss-refactor" into integration

* changes:
refactor(tc): update RSS driver inteface calls
refactor(fvp): update RSS driver inteface calls
refactor(rss): make RSS driver standalone for Measured Boot

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fix(tc): rename macro to match PSA spec

Update 'PSA_INITIAL_ATTEST_TOKEN_MAX_SIZE' to
'PSA_INITIAL_ATTEST_MAX_TOKEN_SIZE' which is defined
in the PSA Certified Attestation API spec.

Change-Id: I583

fix(tc): rename macro to match PSA spec

Update 'PSA_INITIAL_ATTEST_TOKEN_MAX_SIZE' to
'PSA_INITIAL_ATTEST_MAX_TOKEN_SIZE' which is defined
in the PSA Certified Attestation API spec.

Change-Id: I5837fea552e6fe18a203412eb90d41e2f90ad6f1
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

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fix(tc): Correct return type

The fact that this was void instead of int, as required, caused
the test-running code to assume that the tests always failed.

Fixing the return type fixes the always-te

fix(tc): Correct return type

The fact that this was void instead of int, as required, caused
the test-running code to assume that the tests always failed.

Fixing the return type fixes the always-tests-failing bug.

Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
Change-Id: Ief55fe15c437c87dac1d03419a8e148f5d864b8d

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