1# 2# Copyright (c) 2019-2023, Linaro Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7PLAT_QEMU_PATH := plat/qemu/qemu_sbsa 8PLAT_QEMU_COMMON_PATH := plat/qemu/common 9 10include plat/qemu/common/common.mk 11 12CRASH_REPORTING := 1 13 14ifeq (${SPM_MM},1) 15NEED_BL32 := yes 16EL3_EXCEPTION_HANDLING := 1 17GICV2_G0_FOR_EL3 := 1 18endif 19 20# Enable new version of image loading on QEMU platforms 21LOAD_IMAGE_V2 := 1 22 23CTX_INCLUDE_AARCH32_REGS := 0 24ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1) 25$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled") 26endif 27 28ifeq ($(NEED_BL32),yes) 29$(eval $(call add_define,QEMU_LOAD_BL32)) 30endif 31 32PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 33 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 34 drivers/arm/pl011/${ARCH}/pl011_console.S 35 36# Treating this as a memory-constrained port for now 37USE_COHERENT_MEM := 0 38 39# This can be overridden depending on CPU(s) used in the QEMU image 40HW_ASSISTED_COHERENCY := 1 41 42include lib/xlat_tables_v2/xlat_tables.mk 43PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 44 45BL1_SOURCES += drivers/io/io_semihosting.c \ 46 drivers/io/io_storage.c \ 47 drivers/io/io_fip.c \ 48 drivers/io/io_memmap.c \ 49 lib/semihosting/semihosting.c \ 50 lib/semihosting/${ARCH}/semihosting_call.S \ 51 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 52 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 53 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c 54 55BL1_SOURCES += ${QEMU_CPU_LIBS} 56 57BL2_SOURCES += drivers/io/io_semihosting.c \ 58 drivers/io/io_storage.c \ 59 drivers/io/io_fip.c \ 60 drivers/io/io_memmap.c \ 61 lib/semihosting/semihosting.c \ 62 lib/semihosting/${ARCH}/semihosting_call.S \ 63 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 64 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 65 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 66 common/fdt_fixup.c \ 67 $(LIBFDT_SRCS) 68ifeq (${LOAD_IMAGE_V2},1) 69BL2_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 70 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 71 common/desc_image_load.c 72endif 73 74# Include GICv3 driver files 75include drivers/arm/gic/v3/gicv3.mk 76 77QEMU_GIC_SOURCES := ${GICV3_SOURCES} \ 78 plat/common/plat_gicv3.c 79 80BL31_SOURCES += ${QEMU_CPU_LIBS} \ 81 lib/semihosting/semihosting.c \ 82 lib/semihosting/${ARCH}/semihosting_call.S \ 83 plat/common/plat_psci_common.c \ 84 ${PLAT_QEMU_PATH}/sbsa_gic.c \ 85 ${PLAT_QEMU_PATH}/sbsa_pm.c \ 86 ${PLAT_QEMU_PATH}/sbsa_sip_svc.c \ 87 ${PLAT_QEMU_PATH}/sbsa_topology.c \ 88 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 89 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 90 common/fdt_fixup.c \ 91 ${QEMU_GIC_SOURCES} 92 93BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 94 95ifeq (${SPM_MM},1) 96 BL31_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_spm.c 97endif 98 99SEPARATE_CODE_AND_RODATA := 1 100ENABLE_STACK_PROTECTOR := 0 101ifneq ($(ENABLE_STACK_PROTECTOR), 0) 102 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 103endif 104 105MULTI_CONSOLE_API := 1 106 107# Disable the PSCI platform compatibility layer 108ENABLE_PLAT_COMPAT := 0 109 110# Use known base for UEFI if not given from command line 111# By default BL33 is at FLASH1 base 112PRELOADED_BL33_BASE ?= 0x10000000 113 114# Qemu SBSA plafrom only support SEC_SRAM 115BL32_RAM_LOCATION_ID = SEC_SRAM_ID 116$(eval $(call add_define,BL32_RAM_LOCATION_ID)) 117 118# Don't have the Linux kernel as a BL33 image by default 119ARM_LINUX_KERNEL_AS_BL33 := 0 120$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 121$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 122 123ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE 124$(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 125 126# Later QEMU versions support SME and SVE. 127ENABLE_SVE_FOR_NS := 2 128ENABLE_SME_FOR_NS := 2 129 130# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max 131ENABLE_FEAT_FGT := 2 132