1# 2# Copyright (c) 2019-2023, Linaro Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7PLAT_QEMU_PATH := plat/qemu/qemu_sbsa 8PLAT_QEMU_COMMON_PATH := plat/qemu/common 9 10include plat/qemu/common/common.mk 11 12CRASH_REPORTING := 1 13 14ifeq (${SPM_MM},1) 15NEED_BL32 := yes 16EL3_EXCEPTION_HANDLING := 1 17GICV2_G0_FOR_EL3 := 1 18endif 19 20# Enable new version of image loading on QEMU platforms 21LOAD_IMAGE_V2 := 1 22 23CTX_INCLUDE_AARCH32_REGS := 0 24ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1) 25$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled") 26endif 27 28ifeq ($(NEED_BL32),yes) 29$(eval $(call add_define,QEMU_LOAD_BL32)) 30endif 31 32# Treating this as a memory-constrained port for now 33USE_COHERENT_MEM := 0 34 35# This can be overridden depending on CPU(s) used in the QEMU image 36HW_ASSISTED_COHERENCY := 1 37 38BL2_SOURCES += $(LIBFDT_SRCS) 39 40# Include GICv3 driver files 41include drivers/arm/gic/v3/gicv3.mk 42 43QEMU_GIC_SOURCES := ${GICV3_SOURCES} \ 44 plat/common/plat_gicv3.c 45 46BL31_SOURCES += ${PLAT_QEMU_PATH}/sbsa_gic.c \ 47 ${PLAT_QEMU_PATH}/sbsa_pm.c \ 48 ${PLAT_QEMU_PATH}/sbsa_sip_svc.c \ 49 ${PLAT_QEMU_PATH}/sbsa_topology.c 50 51BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 52 53ifeq (${SPM_MM},1) 54 BL31_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_spm.c 55endif 56 57SEPARATE_CODE_AND_RODATA := 1 58ENABLE_STACK_PROTECTOR := 0 59 60MULTI_CONSOLE_API := 1 61 62# Disable the PSCI platform compatibility layer 63ENABLE_PLAT_COMPAT := 0 64 65# Use known base for UEFI if not given from command line 66# By default BL33 is at FLASH1 base 67PRELOADED_BL33_BASE ?= 0x10000000 68 69# Qemu SBSA plafrom only support SEC_SRAM 70BL32_RAM_LOCATION_ID = SEC_SRAM_ID 71$(eval $(call add_define,BL32_RAM_LOCATION_ID)) 72 73# Don't have the Linux kernel as a BL33 image by default 74ARM_LINUX_KERNEL_AS_BL33 := 0 75$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 76$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 77 78ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE 79$(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 80