xref: /rk3399_ARM-atf/plat/qemu/qemu_sbsa/platform.mk (revision 71f5359b114889c9fe4d69d5ce4bde2d0af610e5)
1#
2# Copyright (c) 2019-2023, Linaro Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7PLAT_QEMU_PATH		:=	plat/qemu/qemu_sbsa
8PLAT_QEMU_COMMON_PATH	:=	plat/qemu/common
9
10include plat/qemu/common/common.mk
11
12CRASH_REPORTING	:=	1
13
14ifeq (${SPM_MM},1)
15NEED_BL32		:=	yes
16EL3_EXCEPTION_HANDLING	:=	1
17GICV2_G0_FOR_EL3	:=	1
18endif
19
20# Enable new version of image loading on QEMU platforms
21LOAD_IMAGE_V2		:=	1
22
23CTX_INCLUDE_AARCH32_REGS := 0
24ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
25$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
26endif
27
28ifeq ($(NEED_BL32),yes)
29$(eval $(call add_define,QEMU_LOAD_BL32))
30endif
31
32# Treating this as a memory-constrained port for now
33USE_COHERENT_MEM	:=	0
34
35# This can be overridden depending on CPU(s) used in the QEMU image
36HW_ASSISTED_COHERENCY	:=	1
37
38BL2_SOURCES		+=	$(LIBFDT_SRCS)
39
40# Include GICv3 driver files
41include drivers/arm/gic/v3/gicv3.mk
42
43QEMU_GIC_SOURCES	:=	${GICV3_SOURCES}				\
44				plat/common/plat_gicv3.c
45
46BL31_SOURCES		+=	${QEMU_CPU_LIBS}				\
47				lib/semihosting/semihosting.c			\
48				lib/semihosting/${ARCH}/semihosting_call.S	\
49				plat/common/plat_psci_common.c			\
50				${PLAT_QEMU_PATH}/sbsa_gic.c 			\
51				${PLAT_QEMU_PATH}/sbsa_pm.c			\
52				${PLAT_QEMU_PATH}/sbsa_sip_svc.c		\
53				${PLAT_QEMU_PATH}/sbsa_topology.c		\
54				${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S	\
55				${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c	\
56				common/fdt_fixup.c				\
57				${QEMU_GIC_SOURCES}
58
59BL31_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
60
61ifeq (${SPM_MM},1)
62	BL31_SOURCES		+=	${PLAT_QEMU_COMMON_PATH}/qemu_spm.c
63endif
64
65SEPARATE_CODE_AND_RODATA	:= 1
66ENABLE_STACK_PROTECTOR		:= 0
67
68MULTI_CONSOLE_API	:= 1
69
70# Disable the PSCI platform compatibility layer
71ENABLE_PLAT_COMPAT	:= 0
72
73# Use known base for UEFI if not given from command line
74# By default BL33 is at FLASH1 base
75PRELOADED_BL33_BASE	?= 0x10000000
76
77# Qemu SBSA plafrom only support SEC_SRAM
78BL32_RAM_LOCATION_ID	= SEC_SRAM_ID
79$(eval $(call add_define,BL32_RAM_LOCATION_ID))
80
81# Don't have the Linux kernel as a BL33 image by default
82ARM_LINUX_KERNEL_AS_BL33	:=	0
83$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
84$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
85
86ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
87$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
88
89# Later QEMU versions support SME and SVE.
90ENABLE_SVE_FOR_NS	:= 2
91ENABLE_SME_FOR_NS	:= 2
92
93# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max
94ENABLE_FEAT_FGT 	:= 2
95