History log of /rk3399_ARM-atf/ (Results 16776 – 16800 of 18314)
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495f3d3c31-Oct-2016 David Cunado <david.cunado@arm.com>

Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR

In order to avoid unexpected traps into EL3/MON mode, this patch
resets the debug registers, MDCR_EL3 and MDCR_EL2 for AArch64,
and SDCR and HDC

Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR

In order to avoid unexpected traps into EL3/MON mode, this patch
resets the debug registers, MDCR_EL3 and MDCR_EL2 for AArch64,
and SDCR and HDCR for AArch32.

MDCR_EL3/SDCR is zero'ed when EL3/MON mode is entered, at the
start of BL1 and BL31/SMP_MIN.

For MDCR_EL2/HDCR, this patch zero's the bits that are
architecturally UNKNOWN values on reset. This is done when
exiting from EL3/MON mode but only on platforms that support
EL2/HYP mode but choose to exit to EL1/SVC mode.

Fixes ARM-software/tf-issues#430

Change-Id: Idb992232163c072faa08892251b5626ae4c3a5b6
Signed-off-by: David Cunado <david.cunado@arm.com>

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e830537909-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #753 from douglas-raillard-arm/dr/readme_linaro_release

readme.md: Add tested Linaro release information for FVPs

71b3747d26-Oct-2016 Douglas Raillard <douglas.raillard@arm.com>

readme.md: Add tested Linaro release information for FVPs

The platform testing information in the readme currently states which
Linaro release has been tested on Juno platform.

This patch adds the

readme.md: Add tested Linaro release information for FVPs

The platform testing information in the readme currently states which
Linaro release has been tested on Juno platform.

This patch adds the same information for the AArch64/32 FVPs platforms.

Change-Id: Ifa89843ee1744e5030367197648b7a2f4c44cc24
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>

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948c090d08-Nov-2016 Varun Wadekar <vwadekar@nvidia.com>

spd: dispatcher for interacting with the Trusty TEE

This patch adds the secure payload dispatcher for interacting
with Google's Trusty TEE. Documentation for Trusty can be found
at https://source.an

spd: dispatcher for interacting with the Trusty TEE

This patch adds the secure payload dispatcher for interacting
with Google's Trusty TEE. Documentation for Trusty can be found
at https://source.android.com/security/trusty

Original authors:
-----------------
* Arve Hjønnevåg <arve@android.com>
* Michael Ryleev <gmar@google.com>

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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90d2956a08-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #752 from rockchip-linux/rk3399/fixes-s2r-1107

rk3399: fixes and updates for s2r

f61bf2c708-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #751 from jeenu-arm/ug-reorder

Alphabetical reordering for build options and make files

375d845708-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #750 from jwerner-chromium/m0_build

RK3399 M0 build system improvements

2fae4b1e24-Oct-2016 Jeenu Viswambharan <jeenu.viswambharan@arm.com>

build: Reorder build variables alphabetically

When build variables are assigned or processed en masse, they'd appear
neater in alphabetical order.

Static initializations are moved to a separate fil

build: Reorder build variables alphabetically

When build variables are assigned or processed en masse, they'd appear
neater in alphabetical order.

Static initializations are moved to a separate file,
make_helpers/defaults.mk, which in itself is sorted alphabetically.

No functional changes.

Change-Id: I966010042b33de6b67592fb9ffcef8fc44d7d128
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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01920cfd24-Oct-2016 Jeenu Viswambharan <jeenu.viswambharan@arm.com>

docs: Reorder build options alphabetically

At present, build options in the user guide aren't listed in any
specific order. Ordering them alphabetically is a standard practice, and
is also easier on

docs: Reorder build options alphabetically

At present, build options in the user guide aren't listed in any
specific order. Ordering them alphabetically is a standard practice, and
is also easier on the reader.

Contents unchanged.

Change-Id: Ibc36f3a2a576edb86c1a402430d2ef5adcb2f144
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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0607716126-Oct-2016 Caesar Wang <wxt@rock-chips.com>

rockchip: remove no needed code for rk3399

We have do something for clocks gate.

Fox example as the below:
susped:
clk_gate_con_save();
clk_gate_con_disable();

resume:
clk_gate_con_restore();
--

rockchip: remove no needed code for rk3399

We have do something for clocks gate.

Fox example as the below:
susped:
clk_gate_con_save();
clk_gate_con_disable();

resume:
clk_gate_con_restore();
--

SO, add the plls_suspend_prepare() and plls_resume_finish() are not
necessary to S2R, that will save S2R time if remove them.

BRANCH=none
BUG=chrome-os-partner:58870,chrome-os-partner:55934
TEST=build kevin, two dogfooders with suspend_stress_test
passing 3000 cycles and still going on.

Change-Id: Icfbabc0b3ea8d2b5108d4f3de99a803b6d459669
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

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a14e091604-Nov-2016 Caesar Wang <wxt@rock-chips.com>

rockchip: disable watchdog during suspend

The CA53 and CM0 WDT clock gating in rk3399 SGRF, and ATF is in charge of
it because the kernel can't touch SGRF.

Basically the WDT didn't stop at suspend

rockchip: disable watchdog during suspend

The CA53 and CM0 WDT clock gating in rk3399 SGRF, and ATF is in charge of
it because the kernel can't touch SGRF.

Basically the WDT didn't stop at suspend time, it just switched from the
24M to the 32k clock. That meant that the WDT would fire if you slept for
long enough. In other word, the watchdog timer over count will increase to
750 (24*1000/32) times.
The RK3399 HW watchdog interval is 21 seconds. When machine enters the
suspend, the watchdog will reset the system after 35.7 (750/21) hours.

BUG=chrome-os-partner:59257
TEST=daisydog checked and set value, powerd_dbus_suspend to verify.

Change-Id: I88bb2a05b7d67d5ffd292f9d05d033ae9a6a3593
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

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71581c9c03-Nov-2016 Julius Werner <jwerner@chromium.org>

rockchip: Add proper dependency tracking to M0 Makefile

This patch adds dependency rule generation and inclusion to the M0
Makefile, so that M0 objects will get correctly remade with an
incremental

rockchip: Add proper dependency tracking to M0 Makefile

This patch adds dependency rule generation and inclusion to the M0
Makefile, so that M0 objects will get correctly remade with an
incremental build if a header file they included changed.

Change-Id: I2067bd9fd4d9dad3e77a09cbf09c7b4db3c1eda5
Signed-off-by: Julius Werner <jwerner@chromium.org>

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e77ade2801-Nov-2016 Julius Werner <jwerner@chromium.org>

rockchip: Clean up parent directory creation for M0

The dependencies in the M0 Makefile are not correctly laid out, which
may lead to errors with make -j if the binary target gets evaluated
before t

rockchip: Clean up parent directory creation for M0

The dependencies in the M0 Makefile are not correctly laid out, which
may lead to errors with make -j if the binary target gets evaluated
before the target that creates the directory. In addition, the M0
Makefile just calls mkdir without using the platform-independent macros
from the main ARM TF build system. This patch fixes those issues,
removes some unused (and broken) M0 build targets and merges the two M0
output directories into one (since there's no real point splitting it up
and it creates more hassle).

Change-Id: Ia5002479cf9c57fea7aefa8ca88e373df3a51f61
Signed-off-by: Julius Werner <jwerner@chromium.org>

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d19ce2cb03-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #749 from sandrine-bailleux-arm/sb/fix-bl1_plat_mem_check-doc

Porting guide: Improve bl1_plat_mem_check() doc

2b3ce7b803-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #748 from dp-arm/dp/arm-sip

BL31 runtime instrumentation fixes and documentation update

ba78977003-Nov-2016 Sandrine Bailleux <sandrine.bailleux@arm.com>

Porting guide: Improve bl1_plat_mem_check() doc

This patch fixes the type of the return value of bl1_plat_mem_check()
in the porting guide. It also specifies the expected return value.

Change-Id: I

Porting guide: Improve bl1_plat_mem_check() doc

This patch fixes the type of the return value of bl1_plat_mem_check()
in the porting guide. It also specifies the expected return value.

Change-Id: I7c437342b8bfb1e621d74b2edf0aaf97b913216a
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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bfef610631-Oct-2016 dp-arm <dimitris.papastamos@arm.com>

Perform a cache flush after ENTER PSCI timestamp capture

Without an explicit cache flush, the next timestamp captured might have
a bogus value.

This can happen if the following operations happen in

Perform a cache flush after ENTER PSCI timestamp capture

Without an explicit cache flush, the next timestamp captured might have
a bogus value.

This can happen if the following operations happen in order,
on a CPU that's being powered down.

1) ENTER PSCI timestamp is captured with caches enabled.

2) The next timestamp (ENTER_HW_LOW_PWR) is captured with caches
disabled.

3) On a system that uses a write-back cache configuration, the
cache line that holds the PMF timestamps is evicted.

After step 1), the ENTER_PSCI timestamp is cached and not in main memory.
After step 2), the ENTER_HW_LOW_PWR timestamp is stored in main memory.
Before the CPU power down happens, the hardware evicts the cache line that
contains the PMF timestamps for this service. As a result, the timestamp
captured in step 2) is overwritten with a bogus value.

Change-Id: Ic1bd816498d1a6d4dc16540208ed3a5efe43f529
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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fc1d1e2d14-Oct-2016 dp-arm <dimitris.papastamos@arm.com>

user guide: Document `ENABLE_RUNTIME_INSTRUMENTATION` option

Change-Id: I8e50df67e860b9589834445761a7b9927690fdce
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

2fef96a303-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #745 from rockchip-linux/support-rk3399-dram

Support rk3399 dram

be7b4af303-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #746 from antonio-nino-diaz-arm/an/fix-checkpatch

Fix format of patches passed to checkpatch

9c4c18fa31-Oct-2016 davidcunado-arm <david.cunado@arm.com>

Merge pull request #742 from masahir0y/misc

Comment fixes and .gitignore update

061723f928-Oct-2016 davidcunado-arm <david.cunado@arm.com>

Merge pull request #744 from masahir0y/fiptool

fiptool: fix Segmentation fault when only --verbose option is given

c626311e27-Oct-2016 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Fix format of patches passed to checkpatch

Checkpatch is a script developed to verify the style of Linux kernel
patches. As Kernel developers use emails to send patches for review,
checkpatch is pre

Fix format of patches passed to checkpatch

Checkpatch is a script developed to verify the style of Linux kernel
patches. As Kernel developers use emails to send patches for review,
checkpatch is prepared for that specific format. This change adapts
the Makefile to use said format.

As a result, indentation in the commit message has been removed, thus
fixing the warnings about Signed-off-by lines being preceded by
whitespace.

Fixes ARM-software/tf-issues#432

Change-Id: I00cb86365fe15f7e2c3a99a306c8eb51cf02fe86
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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869605ab27-Oct-2016 davidcunado-arm <david.cunado@arm.com>

Merge pull request #741 from sandrine-bailleux-arm/sb/checkpatch-signoff

Mandate 'Signed-off-by' line in commit messages

6b886ea927-Oct-2016 davidcunado-arm <david.cunado@arm.com>

Merge pull request #738 from dp-arm/dp/fiptool-uuid

fiptool: Link `toc_entry` and `image` structures via UUID

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