History log of /rk3399_ARM-atf/ (Results 16726 – 16750 of 18314)
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919ad05e08-Dec-2016 danh-arm <dan.handley@arm.com>

Merge pull request #773 from dp-arm/dp/fiptool-enhancements

Various fiptool enhancements and bug fixes

ad64ab2808-Dec-2016 danh-arm <dan.handley@arm.com>

Merge pull request #772 from davidcunado-arm/dc/reset_debug_reg

Reset EL2 and EL3 configurable controls

535f185a08-Dec-2016 danh-arm <dan.handley@arm.com>

Merge pull request #770 from yatharth-arm/yk/AArch32_fixes

AArch32: Miscellaneous fixes in the AArch32 code

7ffd088f08-Dec-2016 danh-arm <dan.handley@arm.com>

Merge pull request #767 from antonio-nino-diaz-arm/an/cache-flush

Optimize cache flush when authenticating images

413a1a3008-Dec-2016 danh-arm <dan.handley@arm.com>

Merge pull request #766 from soby-mathew/sm/scpi_reorg

Introduce SCP power management abstraction

5486a96521-Oct-2016 Soby Mathew <soby.mathew@arm.com>

Allow ARM Standard platforms to dynamically define PSCI capability

The capabilities exposed by the PSCI generic layer depends on the hooks
populated by the platform in `plat_arm_psci_pm_ops`. Curren

Allow ARM Standard platforms to dynamically define PSCI capability

The capabilities exposed by the PSCI generic layer depends on the hooks
populated by the platform in `plat_arm_psci_pm_ops`. Currently ARM
Standard platforms statically define this structure. However, some
platforms may want to modify the hooks at runtime before registering
them with the generic layer.

This patch introduces a new ARM platform layer API
`plat_arm_psci_override_pm_ops` which allows the platform to probe
the power controller and modify `plat_arm_psci_pm_ops` if required.
Consequently, 'plat_arm_psci_pm_ops' is no longer qualified as
`const` on ARM Standard platforms.

Change-Id: I7dbb44b7bd36c20ec14ded5ee45a96816ca2ab9d
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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b12a2b4921-Oct-2016 Soby Mathew <soby.mathew@arm.com>

Introduce SCP power management abstraction

This patch introduces an additional layer of abstraction between
CSS power management hooks and the SCPI driver. A new set of APIs
are introduced in order

Introduce SCP power management abstraction

This patch introduces an additional layer of abstraction between
CSS power management hooks and the SCPI driver. A new set of APIs
are introduced in order to abstract out power management operations
from underlying communication mechanism with the SCP.

The SCPI and the associated MHU drivers are moved into a `drivers`
folder in CSS. The new SCP communication abstraction layer is added
in the `drivers/scp` folder. The existing CSS power management
uses the new APIs to reflect this abstraction.

Change-Id: I7d775129fc0558e9703c2724523fb8f0a916838c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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a806dad530-Nov-2016 Jeenu Viswambharan <jeenu.viswambharan@arm.com>

Define and use no_ret macro where no return is expected

There are many instances in ARM Trusted Firmware where control is
transferred to functions from which return isn't expected. Such jumps
are ma

Define and use no_ret macro where no return is expected

There are many instances in ARM Trusted Firmware where control is
transferred to functions from which return isn't expected. Such jumps
are made using 'bl' instruction to provide the callee with the location
from which it was jumped to. Additionally, debuggers infer the caller by
examining where 'lr' register points to. If a 'bl' of the nature
described above falls at the end of an assembly function, 'lr' will be
left pointing to a location outside of the function range. This misleads
the debugger back trace.

This patch defines a 'no_ret' macro to be used when jumping to functions
from which return isn't expected. The macro ensures to use 'bl'
instruction for the jump, and also, for debug builds, places a 'nop'
instruction immediately thereafter (unless instructed otherwise) so as
to leave 'lr' pointing within the function range.

Change-Id: Ib34c69fc09197cfd57bc06e147cc8252910e01b0
Co-authored-by: Douglas Raillard <douglas.raillard@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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a22f628504-Nov-2016 dp-arm <dimitris.papastamos@arm.com>

fiptool: Provide malloc/strdup wrappers to simplify error checking

Change-Id: Ie3e43e9f7d31df40a5997047b9bddec0a06fd47f
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

cc672bb207-Nov-2016 dp-arm <dimitris.papastamos@arm.com>

fiptool: Use getopt for the top level command parsing

Change-Id: I18a4327e41fc090dcea9a647f7673182ca0ed1d9
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

20f87e7807-Nov-2016 dp-arm <dimitris.papastamos@arm.com>

fiptool: Initialize opt_index to 0 for getopt(3)

Change-Id: I62c1a636eb0d9f73fa3a6356e32b5a44f268d421
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

60b499fe04-Nov-2016 dp-arm <dimitris.papastamos@arm.com>

fiptool: Constify various function params

Additionally, remove the -o option for the create command
as it is not supported.

Change-Id: I27993a6fc5e3b0b9710e2ec5322e4296bc87d0df
Signed-off-by: dp-ar

fiptool: Constify various function params

Additionally, remove the -o option for the create command
as it is not supported.

Change-Id: I27993a6fc5e3b0b9710e2ec5322e4296bc87d0df
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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939f66d625-Nov-2016 David Cunado <david.cunado@arm.com>

Reset EL2 and EL3 configurable controls

This patch resets EL2 and EL3 registers that have architecturally
UNKNOWN values on reset and that also provide EL2/EL3 configuration
and trap controls.

Spec

Reset EL2 and EL3 configurable controls

This patch resets EL2 and EL3 registers that have architecturally
UNKNOWN values on reset and that also provide EL2/EL3 configuration
and trap controls.

Specifically, the EL2 physical timer is disabled to prevent timer
interrups into EL2 - CNTHP_CTL_EL2 and CNTHP_CTL for AArch64 and AArch32,
respectively.

Additionally, for AArch64, HSTR_EL2 is reset to avoid unexpected traps of
non-secure access to certain system registers at EL1 or lower.

For AArch32, the patch also reverts the reset to SDCR which was
incorrectly added in a previous change.

Change-Id: If00eaa23afa7dd36a922265194ccd6223187414f
Signed-off-by: David Cunado <david.cunado@arm.com>

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fbb3afbd01-Dec-2016 davidcunado-arm <david.cunado@arm.com>

Merge pull request #771 from geesun/C99

For C99 compliance, changed the unsigned char/short bitfield to unsigned int bitfields

80d4d74817-Nov-2016 Qixiang.Xu <geesun@gmail.com>

emmc/sd: for C99 compliance, changed the unsigned char/short bitfield to unsigned int bitfields

C99 restricts bitfields type is signed and unsigned integer or _Bool.
See section 6.7.2.1 Structure an

emmc/sd: for C99 compliance, changed the unsigned char/short bitfield to unsigned int bitfields

C99 restricts bitfields type is signed and unsigned integer or _Bool.
See section 6.7.2.1 Structure and union specifiers.
"A bit-field shall have a type that is a qualified or unqualified version
of _Bool, signed int, unsigned int, or some other implementation-defined type."

Since the compiler packs bitfields anyways, actual data layout in the structure is unaffected.

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>

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69d59e0c09-Nov-2016 Yatharth Kochar <yatharth.kochar@arm.com>

AArch32: Miscellaneous fixes in the AArch32 code

This patch makes following miscellaneous fixes:
* pl011_console.S: Fixed the bit mask used to check if the
transmit FIFO is full or empty.
* smcc_m

AArch32: Miscellaneous fixes in the AArch32 code

This patch makes following miscellaneous fixes:
* pl011_console.S: Fixed the bit mask used to check if the
transmit FIFO is full or empty.
* smcc_macros.S: Added `_fsxc` suffix while updating the SPSR.
By default the assembler assumes `_fc` suffix which does not
update all the fields in SPSR. By adding `_fsxc` suffix all
the fields gets updated.
* platform_helpers.S: Removed the weak definition for
`plat_my_core_pos()` as this is a mandatory function which
needs to be defined by all platforms.

Change-Id: I8302292533c943686fff8d7c749a07132c052a3b
Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>

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bc8f9b8401-Dec-2016 davidcunado-arm <david.cunado@arm.com>

Merge pull request #769 from sandrine-bailleux-arm/sb/trusty-assert-init

Check Trusty is present during the SPD's initialization

c59428b130-Nov-2016 davidcunado-arm <david.cunado@arm.com>

Merge pull request #761 from soby-mathew/sm/bakery_lock_fixes

Fix normal memory bakery lock implementation

e97e413f30-Nov-2016 Sandrine Bailleux <sandrine.bailleux@arm.com>

Check Trusty is present during the SPD's initialization

Add a debug assertion in the initialization function of Trusty's SPD
to check for the presence of Trusty. If Trusty is absent then the SPD's
s

Check Trusty is present during the SPD's initialization

Add a debug assertion in the initialization function of Trusty's SPD
to check for the presence of Trusty. If Trusty is absent then the SPD's
setup function already detects it and returns an error code so the init
function will never been called. Therefore, a debug assertion is enough
to catch this improbable error case.

Change-Id: Id20013e9291cdeef7827b919de2a22455f6cd9f9
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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0f325c6722-Nov-2016 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Optimize cache flush when authenticating images

When loading and authenticating an image, all parent images must also
be authenticated. The parent images are just certificates that don't
need to be

Optimize cache flush when authenticating images

When loading and authenticating an image, all parent images must also
be authenticated. The parent images are just certificates that don't
need to be used by any other CPU except the one loading the image, and
so there is no need to flush the cache of memory regions where they
are loaded.

Change-Id: Ice8d6979d1c02eabf1a543281ae1a07d098e4a99
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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805972fe25-Nov-2016 davidcunado-arm <david.cunado@arm.com>

Merge pull request #765 from Xilinx/rk3399-cfi

rk3399: Add CFI debug information to SRAM functions

aa2345e924-Nov-2016 Soren Brinkmann <soren.brinkmann@xilinx.com>

rk3399: Add CFI debug information to SRAM functions

Commit b91d935feebdf2c3edef19949023645b6cb34b20
("Add CFI debug frame information for ASM functions") modifies the
assembly macros 'func' and 'end

rk3399: Add CFI debug information to SRAM functions

Commit b91d935feebdf2c3edef19949023645b6cb34b20
("Add CFI debug frame information for ASM functions") modifies the
assembly macros 'func' and 'endfunc' to include CFI debug frame
information.

The rockchip platform uses a custom version of the 'func' macro with the
common 'endfunc' macro. The custom macro wasn't updated in
b91d935feebdf2c3edef19949023645b6cb34b20 resulting in the following
build error:
plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S: Assembler messages:
plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S:155: Error: .cfi_endproc without corresponding .cfi_startproc
Makefile:532: recipe for target 'build/rk3399/release/bl31/plat_helpers.o' failed
make: *** [build/rk3399/release/bl31/plat_helpers.o] Error 1

Fixing this by updating the sram_func macro in the rk3399 port.

Fixes: b91d935feebdf2c3edef19949023645b6cb34b20 ("Add CFI debug frame information for ASM functions")
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

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2fa9489023-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #763 from douglas-raillard-arm/dr/add_debug_frame_info

Add CFI debug frame information for ASM functions

984d54bb23-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #764 from sandrine-bailleux-arm/sb/fix-trusty-build

Minor fixes in the Trusty SPD code

48c1c39f23-Nov-2016 Sandrine Bailleux <sandrine.bailleux@arm.com>

Fix a coding style issue in trusty.c

This patch fixes the following coding style error reported
by the checkpatch.pl script:

Bad function definition - void el3_exit() should probably
be void el

Fix a coding style issue in trusty.c

This patch fixes the following coding style error reported
by the checkpatch.pl script:

Bad function definition - void el3_exit() should probably
be void el3_exit(void)

There is another one but it's a false positive so there's no
point in fixing it:

space prohibited after that '&' (ctx:WxW)
+#define SMC_NR(entity, fn, fastcall, smc64) ((((fastcall) & 0x1) << 31) | \
^
Change-Id: I34de0337c7216dabd16395879f13845a60ee6df0

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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