Merge "fix(sdei): return SDEI_EINVAL if signaling state is incorrect" into integration

docs: updates for playbook

Mention the dependencies than could be taken in TF-A.
Add a dedicated entry for the other repositories updates.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-I

docs: updates for playbook

Mention the dependencies than could be taken in TF-A.
Add a dedicated entry for the other repositories updates.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If354105dcf94c0b305b8b6ac09822a4c42461e96

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refactor(cpus): optimize CVE checking

This patch replaces the use of EXTRA functions
with using erratum entries check
to verify CVE mitigation application for some of
the SMCCC_ARCH_WORKAROUND_* cal

refactor(cpus): optimize CVE checking

This patch replaces the use of EXTRA functions
with using erratum entries check
to verify CVE mitigation application for some of
the SMCCC_ARCH_WORKAROUND_* calls.

Previously, EXTRA functions were individually implemented for
each SMCCC_ARCH_WORKAROUND_*, an approach that becomes unmanageable
with the increasing number of workarounds.
By looking up erratum entries for CVE check, the process is streamlined,
reducing overhead associated with creating and
maintaining EXTRA functions for each new workaround.

New Errata entries are created for SMC workarounds and
that is used to target cpus that are uniquely impacted
by SMC workarounds.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I873534e367a35c99461d0a616ff7bf856a0000af

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refactor(cpus): move errata check to common code

This patch centralizes some of the Errata ABI code
that could be used for checking if an Errata has been applied
to cpu library since the function is

refactor(cpus): move errata check to common code

This patch centralizes some of the Errata ABI code
that could be used for checking if an Errata has been applied
to cpu library since the function is mostly generic.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I2c6d4468f7125d4d99ccdebc5ea8f9e4390360cc

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refactor(cpus): drop unused argument forward_flag

This patch removes the unused argument forward_flag
from verify_errata_implemented function.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@a

refactor(cpus): drop unused argument forward_flag

This patch removes the unused argument forward_flag
from verify_errata_implemented function.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Ib1fcbe081e94657e21d983e0db59ceec9993b696

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feat(versal-net): add SDEI support

Add basic SDEI support with following configuration settings:
- SGI 8 as the source IRQ.
- Special Private event 0.
- One private and shared dynamic event used in

feat(versal-net): add SDEI support

Add basic SDEI support with following configuration settings:
- SGI 8 as the source IRQ.
- Special Private event 0.
- One private and shared dynamic event used in tftf verification
for SDEI support.
- SDEI support is off by default.

Change-Id: I7cfafb84c3fc053ec67258698cf749e63486fe18
Signed-off-by: Amit Nagal <amit.nagal@amd.com>

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Merge "docs(maintainers): update AMD-Xilinx Maintainers" into integration

fix(sdei): return SDEI_EINVAL if signaling state is incorrect

In case a step is omitted when an SDEI event is registered,
enabled, unmasked and then signaled, incorrect code paths
may be reached.

T

fix(sdei): return SDEI_EINVAL if signaling state is incorrect

In case a step is omitted when an SDEI event is registered,
enabled, unmasked and then signaled, incorrect code paths
may be reached.

This patch adds additional checks to return early from such
an incorrect state.

Change-Id: Ia2753e9a1b95544e1afa72603574fe830f51ea9f
Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>
Signed-off-by: Mark Dykes <mark.dykes@arm.com>

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revert(rambus-trng): remove ip-76 driver

The Rambus TRNG IP-76 driver was ported from Linux kernel (omap-rng.c),
which was initially licensed under GPL-2.0. In term of the license
violation, remove

revert(rambus-trng): remove ip-76 driver

The Rambus TRNG IP-76 driver was ported from Linux kernel (omap-rng.c),
which was initially licensed under GPL-2.0. In term of the license
violation, remove this driver and the related SMC call that originally
added by the following two commits:

commit 57660d9d7945 ("plat/marvell/armada/a8k: support HW RNG by SMC")
commit 6aa9f5d164e8 ("drivers/rambus: add TRNG-IP-76 driver")

Change-Id: Id8c99db2e51b49623b3b034106c989a46f690b60
Signed-off-by: Wilson Ding <dingwei@marvell.com>

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feat(mt8189): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I6ca1552a6feb715834efcd6dc6c18a44bc299b34
Signed-off-by: Gavin Liu <gavin.liu@m

feat(mt8189): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I6ca1552a6feb715834efcd6dc6c18a44bc299b34
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>

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Merge "fix(imx8mp): apply ERRATA_A53_1530924 erratum" into integration

Merge "style(clang-format): add Clang-Format configuration" into integration

Merge "feat(mt8196): show ERROR log if need" into integration

Merge "feat(mt8196): enable IRQ configuration" into integration

docs(maintainers): update AMD-Xilinx Maintainers

Update "Xilinx" platform subheader with "AMD-Xilinx", to reuse
the maintainer list for legacy Xilinx platforms and
upcoming AMD platforms.
Update mai

docs(maintainers): update AMD-Xilinx Maintainers

Update "Xilinx" platform subheader with "AMD-Xilinx", to reuse
the maintainer list for legacy Xilinx platforms and
upcoming AMD platforms.
Update maintainer list for AMD-Xilinx platforms in TF-A repository.

Change-Id: I3ea81d36eb8bb5269fe69ca5362800dc309b21c1
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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feat(mt8196): enable IRQ configuration

Enable IRQ configuration to add additional wake-up source to wake up the
SPM.

Change-Id: Id85c74c91801de0617fda104f2beb02f8bf8ef6c
Signed-off-by: Gavin Liu <g

feat(mt8196): enable IRQ configuration

Enable IRQ configuration to add additional wake-up source to wake up the
SPM.

Change-Id: Id85c74c91801de0617fda104f2beb02f8bf8ef6c
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>

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Merge changes I06a7d5b7,I8a39252f into integration

* changes:
feat(mt8189): enable cirq for Mediatek MT8189
feat(mt8189): add GIC driver on MT8189

Merge changes from topic "s32g274a/sd_mov_imm_fixes" into integration

* changes:
fix(s32g274a): reduce the uSDHC clock to 200MHz
refactor(s32g274a): replace mov/movk with mov_imm

feat(mt8189): enable cirq for Mediatek MT8189

- Add CIRQ related information

Change-Id: I06a7d5b71d7e3619db3a8b881788f7625356886a
Signed-off-by: ot_chhao.chang <ot_chhao.chang@mediatek.com>

feat(mt8189): add GIC driver on MT8189

- Add GIC driver and platform configuration.

Change-Id: I8a39252f79752dab1133035750e235962452829c
Signed-off-by: Runyang Chen <runyang.chen@mediatek.corp-part

feat(mt8189): add GIC driver on MT8189

- Add GIC driver and platform configuration.

Change-Id: I8a39252f79752dab1133035750e235962452829c
Signed-off-by: Runyang Chen <runyang.chen@mediatek.corp-partner.google.com>

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feat(mt8196): show ERROR log if need

There are two purposes for hardware semaphores. The first one is for
the SMMU to check the NPU power status, and the second one is for NPU
power control.

In the

feat(mt8196): show ERROR log if need

There are two purposes for hardware semaphores. The first one is for
the SMMU to check the NPU power status, and the second one is for NPU
power control.

In the case of the SMMU, if the hardware semaphore cannot be locked
immediately, it means the NPU is powered off, and simply returning
-EBUSY is sufficient.

Hence, there is no need to show any ERROR message for the SMMU case.
(retry_times == HW_SEM_NO_WAIT)

Change-Id: I1a0b6c16e297c7564518883863ebc67e38b6561a
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>

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Merge "refactor(mediatek): remove unused topology version" into integration

Merge "fix(cm): don't access a field that doesn't exist" into integration

feat(st): adapt .stm32 file creation for clang

The LLVM/clang linker (ld.lld) does not genrate the same map file as
GCC. Adapt the commands to retrieve the load address and entry point
from this new

feat(st): adapt .stm32 file creation for clang

The LLVM/clang linker (ld.lld) does not genrate the same map file as
GCC. Adapt the commands to retrieve the load address and entry point
from this new file.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I54d18f01a96f14f2dc6d5844dc1e8085220706ae

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feat(st): adapt stm32 linker scripts for clang

With Clang, the address inside a section does not seem relative to its
start address. Use ABSOLUTE keyword for those addresses.
For stm32 binary contai

feat(st): adapt stm32 linker scripts for clang

With Clang, the address inside a section does not seem relative to its
start address. Use ABSOLUTE keyword for those addresses.
For stm32 binary containing BL2 and its DT, we can use that as PIE is
not used (either disabled or used with BL2_IN_XIP_MEM).
This is still working with GCC.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4e06c8a72c41370695db27fb6c52414487dfae47

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