plat/arm: Remove comment that mentions LOAD_IMAGE_V2

This option was removed in v2.0.

Change-Id: I0c929fddb57d60c5eff9e45dd5ee8c636b28e6c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1730 from antonio-nino-diaz-arm/an/spdx

Use SPDX identifier in checkpatch config file

Use SPDX identifier in checkpatch config file

Change-Id: I4113604ac69ba07bd90d8268be65cae8aa43138e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1725 from Yann-lms/clang_aarch32

clang: 32 bit compilation should include march32-directive

Merge pull request #1727 from antonio-nino-diaz-arm/an/gitignore

gitignore: Ignore sptool and doimage binaries

Merge pull request #1729 from vwadekar/tegra-native-gicv2

Tegra native gicv2

Tegra: support for native GICv2 drivers

This patch converts Tegra platforms to support native
GICv2 drivers. This involves removes Tegra's GIC driver
port platforms to use interrupt_props

Change-Id

Tegra: support for native GICv2 drivers

This patch converts Tegra platforms to support native
GICv2 drivers. This involves removes Tegra's GIC driver
port platforms to use interrupt_props

Change-Id: I83d8a690ff276dd97928dc60824a4fd36999bb30
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: support to compile native GICv2 drivers

This patch adds a macro to allow platforms to compile native
GICv2 drivers along with Tegra handlers.

Change-Id: I8281796c09dae5704cff2daab831395d65e2

Tegra: support to compile native GICv2 drivers

This patch adds a macro to allow platforms to compile native
GICv2 drivers along with Tegra handlers.

Change-Id: I8281796c09dae5704cff2daab831395d65e261b7
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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gitignore: Ignore sptool and doimage binaries

Change-Id: I119b85179f68148e128cc194f11d2cccb1e33d6d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1721 from marex/arm/master/memsize-passing-v2

plat: rcar: Move FDT from x3 to x1

Merge pull request #1717 from satheesbalya-arm/sb1/sb1_2629_romlib_ifc

romlib: Add platform specific jump table list

romlib: Add platform specific jump table list

This patch allows platforms to define their
own jump table list for library at ROM. The
file has the list of functions to be used
from library at ROM. I

romlib: Add platform specific jump table list

This patch allows platforms to define their
own jump table list for library at ROM. The
file has the list of functions to be used
from library at ROM. It can also include
other list files.

Change-Id: I721c35d7dad3dcadbb3a7f3277bfd5d3e1f6e00a
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

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Merge pull request #1722 from antonio-nino-diaz-arm/an/arch

Synchronize architectural headers with TF-A-Tests

Import exception helpers from TF-A-Tests

This is done in order to keep the files in both repositories in sync.

Change-Id: Ie1a9f321cbcfe8d7d14f206883fa718872271218
Signed-off-by: Antonio Nino Diaz

Import exception helpers from TF-A-Tests

This is done in order to keep the files in both repositories in sync.

Change-Id: Ie1a9f321cbcfe8d7d14f206883fa718872271218
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Deprecate some unused AArch64 assembly functions

Change-Id: I8a0be21783a0c12325e6ab22e9e53ab5466ed9e0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Move helpers from arch.h to arch_helpers.h

Some of the affected macros can only be used from C code. In general, we
use arch_helpers.h for any C helpers to access registers. For
consistency, the oth

Move helpers from arch.h to arch_helpers.h

Some of the affected macros can only be used from C code. In general, we
use arch_helpers.h for any C helpers to access registers. For
consistency, the other macros have been moved as well.

Also, import some AArch32 helpers from TF-A-Tests.

Change-Id: Ie8fe1ddeadba5336c12971ddc39a7883121386b1
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1718 from vwadekar/cc-variable-findstring

build: find "armclang" string in the 'CC' variable

Merge pull request #1719 from Yann-lms/useless_flags

stm32mp1: remove useless compilation flags

clang: 32 bit compilation should include march32-directive

This is done for other compilers, and without this some code does not
compile, like inline assembly code.

Fixes ARM-software/tf-issues#657

clang: 32 bit compilation should include march32-directive

This is done for other compilers, and without this some code does not
compile, like inline assembly code.

Fixes ARM-software/tf-issues#657.

Signed-off-by: Yann Gautier <yann.gautier@st.com>

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mmc: increase delay when initializing mmc

Running TF-A 2.0 and later seems to cause a regression on HiKey 620.

NOTICE: BL2: v2.0(release):v2.0
NOTICE: BL2: Built : 17:41:23, Dec 17 2018

mmc: increase delay when initializing mmc

Running TF-A 2.0 and later seems to cause a regression on HiKey 620.

NOTICE: BL2: v2.0(release):v2.0
NOTICE: BL2: Built : 17:41:23, Dec 17 2018
NOTICE: acpu_dvfs_set_freq: set acpu freq success!ERROR: CMD1 failed after 100 retries
ERROR: BL2: Failed to load image (-5)

The reason seems to be that during emmc enumeration when BL2 sends the command
OCR_SECTOR_MODE | OCR_VDD_MIN_2V7 | OCR_VDD_MIN_1V7

it for some reason takes some more time to get a reply. So a delay with
mdelay(1), seems to not be enough any longer and therefore we increase it to
mdelay(10) instead which makes the device boot as expected again.

Signed-off-by: Joakim Bech <joakim.bech@linaro.org>

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Merge pull request #1720 from jeenu-arm/gic-priority

GIC: Remove lowest priority constants

Merge pull request #1723 from soby-mathew/sm/reset_bl31_fix

FVP: Fixes for RESET_TO_BL31

docs: User-guide corrections for RESET_TO_BL31

This patch updates the user guide instructions for
RESET_TO_SP_MIN and RESET_TO_BL31 cases. The load
address for BL31 had to be updated because of incr

docs: User-guide corrections for RESET_TO_BL31

This patch updates the user guide instructions for
RESET_TO_SP_MIN and RESET_TO_BL31 cases. The load
address for BL31 had to be updated because of increase
in code size. Also, information about PIE support when
RESET_TO_BL31=1 for FVP is added.

In the case of RESET_TO_SP_MIN, the RVBAR address
was wrong in the instruction. This is also corrected
in the patch.

Change-Id: I65fe6d28c5cf79bee0a11fbde320d49fcc1aacf5
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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BL31: correct GOT section omission

When the patch SHA 931f7c6 introduced PIE support for BL31,
adding the GOT section when the SEPARATE_CODE_AND_RODATA=0
to the linker script was erroneously omitted

BL31: correct GOT section omission

When the patch SHA 931f7c6 introduced PIE support for BL31,
adding the GOT section when the SEPARATE_CODE_AND_RODATA=0
to the linker script was erroneously omitted. This patch corrects
the same.

Also the patch reduces the alignment requirement for GOT and RELA
sections from 16 bytes to 8. Comments are added explain the
intent for alignment.

Change-Id: I8035cbf75f346f99bd56b13f32e0b3b70dd2fe6c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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FVP: Change BL31_BASE when RESET_TO_BL31=1

This patch defines BL31_BASE to 0x0 when RESET_TO_BL31=1 as the
executable is built with PIE support and can be loaded anywhere
in SRAM for execution.

Cha

FVP: Change BL31_BASE when RESET_TO_BL31=1

This patch defines BL31_BASE to 0x0 when RESET_TO_BL31=1 as the
executable is built with PIE support and can be loaded anywhere
in SRAM for execution.

Change-Id: I4007f4626322f1200a6304c9c565987d3357986c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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