Merge "fix(intel): solve s10 warm reset issue" into integration

Merge changes I1bb556a8,Ie450acf7 into integration

* changes:
fix(intel): remove wfi polling when performing cpu on
fix(intel): fix socfpga_psci for cpu on off function

Merge "fix(intel): configure usb3 system manager reg in TFA" into integration

Merge changes from topics "juno_measured_boot", "ly/spm-mm-test" into integration

* changes:
feat(fvp): add firmware update agent uuid in StandaloneMm
feat(juno): support image measured boot

Merge changes from topics "fvp_rust_spmc", "juno_measured_boot", "juno_stmm_xferlist" into integration

* changes:
feat(juno): change preprocessor condition for plat_get_mbedtls_heap()
feat(juno)

Merge changes from topics "fvp_rust_spmc", "juno_measured_boot", "juno_stmm_xferlist" into integration

* changes:
feat(juno): change preprocessor condition for plat_get_mbedtls_heap()
feat(juno): change the FW_NS_HANDOFF_BASE
feat(juno): boot with TRANSFER_LIST
feat(juno): organize juno_stmm_manifest.dts
feat(fvp): increase PLAT_ARM_SPMC_SIZE for rust-spmc
feat(fvp): add StandaloneMm manifest for rust-spmc

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feat(fvp): add firmware update agent uuid in StandaloneMm

To support firmware update feature with StandaloneMm,
add firmware update agent uuid for it.

Currently, firmware update feature with Standa

feat(fvp): add firmware update agent uuid in StandaloneMm

To support firmware update feature with StandaloneMm,
add firmware update agent uuid for it.

Currently, firmware update feature with StandaloneMm is supprted
in SPMC_AT_EL3 only.

Change-Id: I095fb969d22aff36a9f8433a7b731b8023496437
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(juno): change preprocessor condition for plat_get_mbedtls_heap()

The implementation of plat_get_mbedtls_heap() is mandatory
not only when TRUSTED_BOARD_BOOT is enabled,
but also when MEASURED_B

feat(juno): change preprocessor condition for plat_get_mbedtls_heap()

The implementation of plat_get_mbedtls_heap() is mandatory
not only when TRUSTED_BOARD_BOOT is enabled,
but also when MEASURED_BOOT is enabled. But to use either
TRUSTED_BOARD_BOOT or MEASURED_BOOT, it should be
built with CRYPTO_SUPPORT.

Therefore, change the preprocessor condition for
plat_get_mbedtls_heap() with CRYPTO_SUPPORT and
move this function to juno_common.c

Change-Id: I8ec9eaa87f58b760b47c5245b3bca234a9a77075
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(juno): support image measured boot

Support measured boot with image & configuration hash in juno board with
SPMC_AT_EL3.

Change-Id: I89514c2fee64a7a7aadef28366875df4d4d9243a
Signed-off-by: Yeo

feat(juno): support image measured boot

Support measured boot with image & configuration hash in juno board with
SPMC_AT_EL3.

Change-Id: I89514c2fee64a7a7aadef28366875df4d4d9243a
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(juno): change the FW_NS_HANDOFF_BASE

Before supporting StandaloneMm in Juno, the PLAT_SP_IMAGE_NS_BUF_BASE
doesn't use so it's find to use as FW_NS_HANDOFF_BASE.;
But as juno support Standalone

feat(juno): change the FW_NS_HANDOFF_BASE

Before supporting StandaloneMm in Juno, the PLAT_SP_IMAGE_NS_BUF_BASE
doesn't use so it's find to use as FW_NS_HANDOFF_BASE.;
But as juno support StandaloneMm, PLAT_SP_IMAGE_NS_BUF_BASE is used for
non shared buffer between normal world and secure world,
it couldn't be used as FW_NS_HANDOFF_BASE.

Like FVP board, change FW_NS_HANDOFF_BASE as
(PLAT_ARM_NS_IMAGE_BASE - PLAT_ARM_FW_HANDOFF_SIZE) so that
it doesn't overlap with ns shared buffer.

Change-Id: I9fcf31a91fd12e931fb4c41341cdaa23057453cd
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(juno): boot with TRANSFER_LIST

This patch supports booting with TRANSFER_LIST option in juno board.

Change-Id: I6d5a8c765291c301cf1e25e1ce12d0f7058979c7
Signed-off-by: Yeoreum Yun <yeoreum.yun

feat(juno): boot with TRANSFER_LIST

This patch supports booting with TRANSFER_LIST option in juno board.

Change-Id: I6d5a8c765291c301cf1e25e1ce12d0f7058979c7
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(juno): organize juno_stmm_manifest.dts

To generalize manifest file for StandaloneMm for juno board,
organize this manifest file with stmm_*.dtsi.

Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.co

feat(juno): organize juno_stmm_manifest.dts

To generalize manifest file for StandaloneMm for juno board,
organize this manifest file with stmm_*.dtsi.

Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
Change-Id: I138e01b8327fa0136ca255c213bf846de7229f23

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feat(fvp): increase PLAT_ARM_SPMC_SIZE for rust-spmc

rust-spmc [0] which is experimental S-EL1 SPMC uses
PLAT_ARM_TRUSTED_DRAM area to run itself as much as
16MB (half of PLAT_ARM_TRUSTED_DRAM).

Ho

feat(fvp): increase PLAT_ARM_SPMC_SIZE for rust-spmc

rust-spmc [0] which is experimental S-EL1 SPMC uses
PLAT_ARM_TRUSTED_DRAM area to run itself as much as
16MB (half of PLAT_ARM_TRUSTED_DRAM).

However since PLAT_ARM_SPMC_SIZE is defined as 2MB,
the memory layout specified in arm_spm_def.h defines wrong value.
(i.e) PLAT_SPM_BUF_BASE, secure crb buffer and etc.

To resolve this increase the PLAT_ARM_SPMC_SIZE to 16MB.

Link: https://git.trustedfirmware.org/rust-spmc/rust-spmc.git [0]
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
Change-Id: Ief207d787dd83e7a8e3c55f39fbc25d964ee8b25

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feat(fvp): add StandaloneMm manifest for rust-spmc

The rust-spmc [0] is the BL32 binary which is
SPMC in S-EL1 (experimental).
This patch adds StandaloneMm manifest file used with rust spmc.

Link:

feat(fvp): add StandaloneMm manifest for rust-spmc

The rust-spmc [0] is the BL32 binary which is
SPMC in S-EL1 (experimental).
This patch adds StandaloneMm manifest file used with rust spmc.

Link: https://git.trustedfirmware.org/rust-spmc/rust-spmc.git [0]
Change-Id: I9e79c001257647d4243a1177fe9796f664788406
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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fix(bl31): declare function as static

This corrects the MISRA violation C2012-8.7:
Functions and objects should not be defined with external linkage
if they are referenced in only one translation un

fix(bl31): declare function as static

This corrects the MISRA violation C2012-8.7:
Functions and objects should not be defined with external linkage
if they are referenced in only one translation unit.
The functions are declared as static that are referenced only
within a translation unit.

Change-Id: I785f9cd5378fa229812786d6877a5559983d32f3
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(psci): initialise variable to default zero

This corrects the MISRA violation C2012-9.1:
The value of an object with automatic storage duration shall not
be read before it has been set.
Initializ

fix(psci): initialise variable to default zero

This corrects the MISRA violation C2012-9.1:
The value of an object with automatic storage duration shall not
be read before it has been set.
Initialized the variable to default value zero.

Change-Id: I225ae4487b05fc47728222765029d6e1fe292ac1
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(services): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-

fix(services): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: I44aa576a081f0925aa29b42d7432faec46605a87
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(lib): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: I

fix(lib): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: I979ba118fd209be5d4f0bff3978479c22428d79b
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change

fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: Ifa48fa64e87481bb43a877f39f48108fd2e13c42
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(intel): solve s10 warm reset issue

This is extension of the patch to fix the warm
reset issue in agilex refer to this commit 7f4fa931a.

The warm reset not able to trigger due to the system
not

fix(intel): solve s10 warm reset issue

This is extension of the patch to fix the warm
reset issue in agilex refer to this commit 7f4fa931a.

The warm reset not able to trigger due to the system
not able to detect the magic number. ATF only able
to solve for boot core. For secondary cores, Linux
need to update psci driver to WFI the cores in EL3.
Original Linux WFI is EL1.
Thus causing secondary cores not working.

Change-Id: Iee5e3f6d3334832fe432721fcf7b872534334988
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>

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Merge changes from topic "ar/x4_errata" into integration

* changes:
fix(cpus): workaround for Cortex-X4 erratum 3887999
fix(cpus): workaround for Cortex-X4 erratum 3133195

fix(cpus): workaround for Cortex-X4 erratum 3887999

Cortex-X4 erratum 3887999 is a Cat B erratum that applies
to all revisions <= r0p3 and is still open.

The erratum can be avoided by setting CPUAC

fix(cpus): workaround for Cortex-X4 erratum 3887999

Cortex-X4 erratum 3887999 is a Cat B erratum that applies
to all revisions <= r0p3 and is still open.

The erratum can be avoided by setting CPUACTLR2[22] to 1'b1 which will
disable linking multiple Non-Cacheable or Device GRE loads to the same
read request for the cache-line. This might have a significant
performance impact to Non-cacheable and Device GRE read bandwidth for
streaming scenarios

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I851746b7b430eac85184c8d402d1aa5bb3c94a8e

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fix(cpus): workaround for Cortex-X4 erratum 3133195

Cortex-X4 erratum 3133195 is a Cat B erratum that applies
to all revisions = r0p2 and is fixed in r0p3.

This erratum can be avoided by writing to

fix(cpus): workaround for Cortex-X4 erratum 3133195

Cortex-X4 erratum 3133195 is a Cat B erratum that applies
to all revisions = r0p2 and is fixed in r0p3.

This erratum can be avoided by writing to a set of implementation
defined registers which will execute a PSB instruction following
the TSB CSYNC instruction.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Id44daf950124e7c2d46cb5d6d6a1083d06fad12d

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Merge changes Ic01517d5,I43af5796,I540e113f,I15646753,I180d38fe, ... into integration

* changes:
fix(cpus): organize Cortex-X2 errata entries
fix(cpus): workaround for Cortex-X2 erratum 2291219

Merge changes Ic01517d5,I43af5796,I540e113f,I15646753,I180d38fe, ... into integration

* changes:
fix(cpus): organize Cortex-X2 errata entries
fix(cpus): workaround for Cortex-X2 erratum 2291219
fix(cpus): workaround for Cortex-X2 erratum 2267065
fix(cpus): workaround for Cortex-X2 erratum 2136059
fix(cpus): workaround for Cortex-X2 erratum 1934260
fix(cpus): workaround for Cortex-X2 erratum 1927200
fix(cpus): workaround for Cortex-X2 erratum 1917258
fix(cpus): workaround for Cortex-X2 erratum 1916945
fix(cpus): workaround for Cortex-X2 erratum 1901946

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Merge changes from topic "hm/dt" into integration

* changes:
refactor(arm): unify SPSR retrieval logic
feat(fvp): enable kernel dt convention

refactor(arm): unify SPSR retrieval logic

Consolidate platform-specific SPSR setup logic into a single
arm_get_spsr() function that accepts an image_id to select between BL32
and BL33. This reduces

refactor(arm): unify SPSR retrieval logic

Consolidate platform-specific SPSR setup logic into a single
arm_get_spsr() function that accepts an image_id to select between BL32
and BL33. This reduces duplication and simplifies control over SPSR
generation for later stages, particularly BL33.

The SPD remains responsible for setting the SPSR for BL32.

Change-Id: Ibbba708d607e7676989f5c7ceffe33d7bb2195f1
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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