Merge "fix(versal2): update DDR address map" into integration

Merge "feat(versal2): update platform version to versal2" into integration

fix(psci): check if a core is the last one in a requested power level

PSCI OS initiated is usually implemented with the extended state id
format, however this does not have to be the case. When this

fix(psci): check if a core is the last one in a requested power level

PSCI OS initiated is usually implemented with the extended state id
format, however this does not have to be the case. When this is the
case, the original format will carry the requested power level in
the PowerLevel field. To validate that the requested power state is
valid we must save it so that later when we call
psci_is_last_cpu_to_idle_at_pwrlvl() it checks the right level (instead
of a default 0).

This came up when testing 01959a1656a08dacd1d036d0441165d52bf7563e for
all configurations.

Change-Id: Iaab88c1910467282ae524861446283acddd9d977
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap

This region is defined in LPM driver. Prefer managing this region in
LPM driver and remove it from plat_mmap and platform_def.h.

Change-I

fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap

This region is defined in LPM driver. Prefer managing this region in
LPM driver and remove it from plat_mmap and platform_def.h.

Change-Id: I57bfaad88a28d4f29e2b132ba080bc7d5b8248d8
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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feat(mediatek): update mtk_sip_def.h

Update missing SiP SCM ID definitions. Those definitons are required
when linking to the proprietary library.

Change-Id: I6b912cee9bcceac774ff2228a1e335073a1d5e

feat(mediatek): update mtk_sip_def.h

Update missing SiP SCM ID definitions. Those definitons are required
when linking to the proprietary library.

Change-Id: I6b912cee9bcceac774ff2228a1e335073a1d5ea7
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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Merge "fix(mt8196): add whole-archive option to prebuilt library" into integration

feat(mt8196): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chro

feat(mt8196): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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feat(mt8196): refactor LPM header include paths to use lpm_v2

These changes align the project with the latest directory structure
and ensure consistency in header references.

Signed-off-by: Wenzhen

feat(mt8196): refactor LPM header include paths to use lpm_v2

These changes align the project with the latest directory structure
and ensure consistency in header references.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I7f3c42cbd9a803064bbfed67cd8f309638da8441

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refactor(mediatek): update API calls to MTK GIC v3 driver

Updated the code to call the API of MTK GIC v3.

Change-Id: I1bb1771dda4d5532b1b818864f823dbb7a38094d
Signed-off-by: Gavin Liu <gavin.liu@me

refactor(mediatek): update API calls to MTK GIC v3 driver

Updated the code to call the API of MTK GIC v3.

Change-Id: I1bb1771dda4d5532b1b818864f823dbb7a38094d
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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feat(rdv3): enable the support to fetch dynamic config

To enable the support to load Hafnium as BL32, BL31 needs firmware
configuration info to get BL32 manifest load location. The load address
of B

feat(rdv3): enable the support to fetch dynamic config

To enable the support to load Hafnium as BL32, BL31 needs firmware
configuration info to get BL32 manifest load location. The load address
of BL32 is passed via firmware config info.

Add the support to get the address using fconf framework from dynamic
config info.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>
Change-Id: I3a2a5706789ed290dc7f4a67e62e03751b930c02

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feat(rdv3): add dts files to enable hafnium as BL32

On RD-V3 platform and variants, Hafnium is used as SPMC running at
S-EL2 and manage SP running at S-EL0. Hafnium is loaded and configured
as BL32

feat(rdv3): add dts files to enable hafnium as BL32

On RD-V3 platform and variants, Hafnium is used as SPMC running at
S-EL2 and manage SP running at S-EL0. Hafnium is loaded and configured
as BL32 image. SP is loaded by SP load framework and configured by
Hafnium.

Add the dts files needed to enable load and configuration of hafnium and
SP.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>
Change-Id: I7de72052323ff9106d7bedbaaf5ece3272e9a6cd

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feat(rdv3): define SPMC manifest base address

ARM_SPMC_MANIFEST_BASE defines the base address of the SPMC manifest
used by BL32. In the non-RESET_TO_BL31 case, it is defined relative to
the top of T

feat(rdv3): define SPMC manifest base address

ARM_SPMC_MANIFEST_BASE defines the base address of the SPMC manifest
used by BL32. In the non-RESET_TO_BL31 case, it is defined relative to
the top of Trusted SRAM. However, for RESET_TO_BL31, the
PLAT_ARM_SPMC_MANIFEST_BASE macro can be used to set it to a different
location which is then used to populate ARM_SPMC_MANIFEST_BASE.

As the RD-V3 platform and its variants have a different SRAM layout
compared to that defined in arm_def.h, define the
PLAT_ARM_SPMC_MANIFEST_BASE macro to an address suitable for this
platform and its variants.

Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>
Change-Id: I36e1eb21ab3d1c68bddb52c62198fcdfc40d8993

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feat(arm): add a macro for SPMC manifest base address

In RESET_TO_BL31, the SPMC manifest base address that is utilized by
bl32_image_ep_info has to be statically defined as DT is not available.
Com

feat(arm): add a macro for SPMC manifest base address

In RESET_TO_BL31, the SPMC manifest base address that is utilized by
bl32_image_ep_info has to be statically defined as DT is not available.
Common arm code sets this to the top of SRAM using macros but it can be
different for some platforms. Hence, introduce the macro
PLAT_ARM_SPMC_MANIFEST_BASE that could be re-defined by platform as per
their use-case. Platforms that utilize arm_def.h would use the existing
value from arm common code.

Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>
Change-Id: I4491749ad2b5794e06c9bd11ff61e2e64f21a948

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Merge "fix(arm): create build directory before key generation" into integration

fix(mt8196): add whole-archive option to prebuilt library

Added `-Wl,--whole-archive` option to the LDLIBS in the platfrom.mk to
ensure that the symbols within the library are not stripped during th

fix(mt8196): add whole-archive option to prebuilt library

Added `-Wl,--whole-archive` option to the LDLIBS in the platfrom.mk to
ensure that the symbols within the library are not stripped during the
linking process.

Change-Id: I35c728d3ccc98489183285a96f703e02dc7505d3
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge "feat(mt8196): add SMMU driver for PM" into integration

fix(rdn2): correct RD-N2 StMM uuid format

Edk2 converts StMM GUID to UUID format, which is used in FF-A and linux
kernel. StMM manifest currently provides GUID format. Correcting this to
UUID format

fix(rdn2): correct RD-N2 StMM uuid format

Edk2 converts StMM GUID to UUID format, which is used in FF-A and linux
kernel. StMM manifest currently provides GUID format. Correcting this to
UUID format.

Change-Id: Ie94728e5ea74d3d9935e0af9a2a601cbafe5ad3d
Signed-off-by: Jerry Wang <Jerry.Wang4@arm.com>

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Merge changes from topic "us_tc_trng" into integration

* changes:
feat(tc): get entropy with PSA Crypto API
feat(psa): add interface with RSE for retrieving entropy
fix(psa): guard Crypto APIs

Merge changes from topic "us_tc_trng" into integration

* changes:
feat(tc): get entropy with PSA Crypto API
feat(psa): add interface with RSE for retrieving entropy
fix(psa): guard Crypto APIs with CRYPTO_SUPPORT
feat(tc): enable trng
feat(tc): initialize the RSE communication in earlier phase

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feat(rdv3): add carveout for BL32 image

Add and map the carveout for loading Hafnium as BL32 image. Also define
PLAT_ARM_SP_MAX_SIZE as 3 MB for secure partitions.

Signed-off-by: Rohit Mathew <rohi

feat(rdv3): add carveout for BL32 image

Add and map the carveout for loading Hafnium as BL32 image. Also define
PLAT_ARM_SP_MAX_SIZE as 3 MB for secure partitions.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>
Change-Id: I2845eb6807a127c9f6b92de2dabc9a58d25bd4d4

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feat(rdv3): introduce platform handler for Group0 interrupt

This patch introduces a handler for RD-V3 variants to handle Group0
secure interrupts. Currently, it is empty but serves as a placeholder

feat(rdv3): introduce platform handler for Group0 interrupt

This patch introduces a handler for RD-V3 variants to handle Group0
secure interrupts. Currently, it is empty but serves as a placeholder
for future Group0 interrupt sources.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>
Change-Id: Ifa418094f6075a6cdc33e63eec1825103bbf6d68

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feat(neoverse-rd): use larger stack size when S-EL2 spmc is enabled

Larger stack size is needed when S-EL2 SPMC is enabled. This is required
because BL31 xlat map framework makes more nested calls w

feat(neoverse-rd): use larger stack size when S-EL2 spmc is enabled

Larger stack size is needed when S-EL2 SPMC is enabled. This is required
because BL31 xlat map framework makes more nested calls when this
feature is enabled.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>
Change-Id: Ib3f2abf38b576ba96402dab4ba995d8b648b4cc7

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fix(neoverse-rd): set correct SVE vector lengths

Affected platforms: RD-N2, RD-V1, RD-V1-MC, RD-V3 and their
configurations.

Previously, the SVE vector lengths for these platforms were
being taken

fix(neoverse-rd): set correct SVE vector lengths

Affected platforms: RD-N2, RD-V1, RD-V1-MC, RD-V3 and their
configurations.

Previously, the SVE vector lengths for these platforms were
being taken from the default configuration. This commit updates
their respective platform.mk files to specify the correct vector
lengths.

Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>
Change-Id: I8919257e2cec5c0e819424ff44a623dc3ab1a368

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Merge "fix(tc): enable Last-level cache (LLC) for tc4" into integration

Merge "refactor(bl32): flush before console switch state" into integration

feat(tc): get entropy with PSA Crypto API

The PSA Crypto API is available with sending messages to RSE. Change
to invoke PSA Crypto API for getting entropy.

Change-Id: I4b2dc4eb99606c2425b64949d9c

feat(tc): get entropy with PSA Crypto API

The PSA Crypto API is available with sending messages to RSE. Change
to invoke PSA Crypto API for getting entropy.

Change-Id: I4b2dc4eb99606c2425b64949d9c3f5c576883758
Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>

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