1# Copyright (c) 2021-2025, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8TARGET_FLAVOUR := fvp 9# DPU with SCMI may not necessarily work, so allow its independence 10TC_DPU_USE_SCMI_CLK := 1 11# SCMI power domain control enable 12TC_SCMI_PD_CTRL_EN := 1 13 14# System setup 15CSS_USE_SCMI_SDS_DRIVER := 1 16HW_ASSISTED_COHERENCY := 1 17USE_COHERENT_MEM := 0 18GIC_ENABLE_V4_EXTN := 1 19GICV3_SUPPORT_GIC600 := 1 20override NEED_BL2U := no 21override ARM_PLAT_MT := 1 22 23# CPU setup 24ARM_ARCH_MINOR := 7 25BRANCH_PROTECTION := 1 26ENABLE_FEAT_MPAM := 1 # default is 2, optimise 27ENABLE_SVE_FOR_NS := 2 # to show we use it 28ENABLE_SVE_FOR_SWD := 1 29ENABLE_SME_FOR_NS := 2 30ENABLE_SME2_FOR_NS := 2 31ENABLE_SME_FOR_SWD := 1 32ENABLE_TRBE_FOR_NS := 1 33ENABLE_SYS_REG_TRACE_FOR_NS := 1 34ENABLE_FEAT_AMU := 1 35ENABLE_AMU_FCONF := 1 36ENABLE_AMU_AUXILIARY_COUNTERS := 1 37ENABLE_MPMM := 1 38ENABLE_FEAT_MTE2 := 2 39ENABLE_SPE_FOR_NS := 3 40ENABLE_FEAT_TCR2 := 3 41 42ifneq ($(filter ${TARGET_PLATFORM}, 3),) 43ENABLE_FEAT_RNG_TRAP := 0 44else 45ENABLE_FEAT_RNG_TRAP := 1 46endif 47 48CTX_INCLUDE_AARCH32_REGS := 0 49 50ifeq (${SPD},spmd) 51 SPMD_SPM_AT_SEL2 := 1 52 CTX_INCLUDE_PAUTH_REGS := 1 53endif 54 55TRNG_SUPPORT := 1 56 57# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP) 58TC_RESOLUTION_OPTIONS := 640x480p60 \ 59 1920x1080p60 60# Set default to the 640x480p60 resolution mode 61TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS)) 62 63# Check resolution option for FVP 64ifneq ($(filter ${TARGET_FLAVOUR}, fvp),) 65ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),) 66 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS}) 67endif 68endif 69 70ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0) 71 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.) 72endif 73 74ifneq ($(shell expr $(TARGET_PLATFORM) = 2), 0) 75 $(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \ 76 Some of the features might not work as expected) 77endif 78 79ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0) 80 $(error TARGET_PLATFORM must be less than or equal to 4) 81endif 82 83ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),) 84 $(error TARGET_FLAVOUR must be fvp or fpga) 85endif 86 87# Support for loading FS Image to DRAM 88TC_FPGA_FS_IMG_IN_RAM := 0 89 90# Support Loading of FIP image to DRAM 91TC_FPGA_FIP_IMG_IN_RAM := 0 92 93# Use simple panel instead of vencoder with DPU 94TC_DPU_USE_SIMPLE_PANEL := 0 95 96$(eval $(call add_defines, \ 97 TARGET_PLATFORM \ 98 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \ 99 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \ 100 TC_DPU_USE_SCMI_CLK \ 101 TC_SCMI_PD_CTRL_EN \ 102 TC_FPGA_FS_IMG_IN_RAM \ 103 TC_FPGA_FIP_IMG_IN_RAM \ 104 TC_DPU_USE_SIMPLE_PANEL \ 105)) 106 107CSS_LOAD_SCP_IMAGES := 1 108 109# Save DSU PMU registers on cluster off and restore them on cluster on 110PRESERVE_DSU_PMU_REGS := 1 111 112# Specify MHU type based on platform 113ifneq ($(filter ${TARGET_PLATFORM}, 2),) 114 PLAT_MHU := MHUv2 115else 116 PLAT_MHU := MHUv3 117endif 118 119# Include GICv3 driver files 120include drivers/arm/gic/v3/gicv3.mk 121 122ENT_GIC_SOURCES := ${GICV3_SOURCES} \ 123 plat/common/plat_gicv3.c \ 124 plat/arm/common/arm_gicv3.c 125 126TC_BASE = plat/arm/board/tc 127 128PLAT_INCLUDES += -I${TC_BASE}/include/ \ 129 -I${TC_BASE}/fdts/ 130 131# CPU libraries for TARGET_PLATFORM=1 132ifeq (${TARGET_PLATFORM}, 1) 133TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \ 134 lib/cpus/aarch64/cortex_a715.S \ 135 lib/cpus/aarch64/cortex_x3.S 136endif 137 138# CPU libraries for TARGET_PLATFORM=2 139ifeq (${TARGET_PLATFORM}, 2) 140ERRATA_A520_2938996 := 1 141ERRATA_X4_2726228 := 1 142 143TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 144 lib/cpus/aarch64/cortex_a720.S \ 145 lib/cpus/aarch64/cortex_x4.S 146endif 147 148# CPU libraries for TARGET_PLATFORM=3 149ifeq (${TARGET_PLATFORM}, 3) 150ERRATA_A520_2938996 := 1 151 152TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 153 lib/cpus/aarch64/cortex_a725.S \ 154 lib/cpus/aarch64/cortex_x925.S 155endif 156 157# CPU libraries for TARGET_PLATFORM=4 158ifeq (${TARGET_PLATFORM}, 4) 159FEAT_PABANDON := 1 160# prevent CME related wakups 161ERRATA_SME_POWER_DOWN := 1 162TC_CPU_SOURCES += lib/cpus/aarch64/cortex_gelas.S \ 163 lib/cpus/aarch64/nevis.S \ 164 lib/cpus/aarch64/travis.S 165endif 166 167INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c \ 168 plat/arm/common/arm_ni.c 169 170PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 171 ${TC_BASE}/include/tc_helpers.S 172 173 174ifneq (${ENABLE_STACK_PROTECTOR},0) 175PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c 176endif 177 178BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 179 ${TC_CPU_SOURCES} \ 180 ${TC_BASE}/tc_trusted_boot.c \ 181 ${TC_BASE}/tc_bl1_setup.c \ 182 ${TC_BASE}/tc_err.c \ 183 drivers/arm/sbsa/sbsa.c 184 185BL2_SOURCES += ${TC_BASE}/tc_security.c \ 186 ${TC_BASE}/tc_err.c \ 187 ${TC_BASE}/tc_trusted_boot.c \ 188 ${TC_BASE}/tc_bl2_setup.c \ 189 lib/utils/mem_region.c \ 190 drivers/arm/tzc/tzc400.c \ 191 plat/arm/common/arm_nor_psci_mem_protect.c 192 193ifeq ($(shell test $(TARGET_PLATFORM) -le 2; echo $$?),0) 194BL2_SOURCES += plat/arm/common/arm_tzc400.c 195endif 196 197BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 198 ${TC_CPU_SOURCES} \ 199 ${ENT_GIC_SOURCES} \ 200 ${TC_BASE}/tc_bl31_setup.c \ 201 ${TC_BASE}/tc_topology.c \ 202 lib/fconf/fconf.c \ 203 lib/fconf/fconf_dyn_cfg_getter.c \ 204 drivers/arm/css/dsu/dsu.c \ 205 drivers/cfi/v2m/v2m_flash.c \ 206 lib/utils/mem_region.c \ 207 plat/arm/common/arm_nor_psci_mem_protect.c \ 208 drivers/arm/sbsa/sbsa.c 209 210BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 211 212# Add the FDT_SOURCES and options for Dynamic Config 213FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 214 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \ 215 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts 216FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 217TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 218FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 219 220# Add the FW_CONFIG to FIP and specify the same to certtool 221$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 222# Add the TB_FW_CONFIG to FIP and specify the same to certtool 223$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 224# Add the NT_FW_CONFIG to FIP and specify the same to certtool 225$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 226 227ifeq (${SPD},spmd) 228ifeq ($(ARM_SPMC_MANIFEST_DTS),) 229ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts 230endif 231 232FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 233TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 234 235# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 236$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 237endif 238 239#Device tree 240TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts 241TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 242FDT_SOURCES += ${TC_HW_CONFIG_DTS} 243$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 244 245# Add the HW_CONFIG to FIP and specify the same to certtool 246$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 247 248$(info Including rse_comms.mk) 249include drivers/arm/rse/rse_comms.mk 250 251BL1_SOURCES += ${RSE_COMMS_SOURCES} \ 252 plat/arm/board/tc/tc_rse_comms.c 253BL2_SOURCES += ${RSE_COMMS_SOURCES} \ 254 plat/arm/board/tc/tc_rse_comms.c 255BL31_SOURCES += ${RSE_COMMS_SOURCES} \ 256 plat/arm/board/tc/tc_rse_comms.c \ 257 lib/psa/rse_platform.c 258 259# Include Measured Boot makefile before any Crypto library makefile. 260# Crypto library makefile may need default definitions of Measured Boot build 261# flags present in Measured Boot makefile. 262ifeq (${MEASURED_BOOT},1) 263 ifeq (${DICE_PROTECTION_ENVIRONMENT},1) 264 $(info Including qcbor.mk) 265 include drivers/measured_boot/rse/qcbor.mk 266 $(info Including dice_prot_env.mk) 267 include drivers/measured_boot/rse/dice_prot_env.mk 268 269 BL1_SOURCES += ${QCBOR_SOURCES} \ 270 ${DPE_SOURCES} \ 271 plat/arm/board/tc/tc_common_dpe.c \ 272 plat/arm/board/tc/tc_bl1_dpe.c \ 273 lib/psa/dice_protection_environment.c \ 274 drivers/arm/css/sds/sds.c \ 275 drivers/delay_timer/delay_timer.c \ 276 drivers/delay_timer/generic_delay_timer.c 277 278 BL2_SOURCES += ${QCBOR_SOURCES} \ 279 ${DPE_SOURCES} \ 280 plat/arm/board/tc/tc_common_dpe.c \ 281 plat/arm/board/tc/tc_bl2_dpe.c \ 282 lib/psa/dice_protection_environment.c 283 284 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \ 285 -Iinclude/lib/dice 286 else 287 $(info Including rse_measured_boot.mk) 288 include drivers/measured_boot/rse/rse_measured_boot.mk 289 290 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \ 291 plat/arm/board/tc/tc_common_measured_boot.c \ 292 plat/arm/board/tc/tc_bl1_measured_boot.c \ 293 lib/psa/measured_boot.c 294 295 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \ 296 plat/arm/board/tc/tc_common_measured_boot.c \ 297 plat/arm/board/tc/tc_bl2_measured_boot.c \ 298 lib/psa/measured_boot.c 299 endif 300endif 301 302BL31_SOURCES += plat/arm/board/tc/tc_trng.c 303 304ifneq (${ENABLE_FEAT_RNG_TRAP},0) 305 BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c 306endif 307 308ifneq (${PLATFORM_TEST},) 309 # Add this include as first, before arm_common.mk. This is necessary 310 # because arm_common.mk builds Mbed TLS, and platform_test.mk can 311 # change the list of Mbed TLS files that are to be compiled 312 # (LIBMBEDTLS_SRCS). 313 include plat/arm/board/tc/platform_test.mk 314endif 315 316 317include plat/arm/common/arm_common.mk 318include plat/arm/css/common/css_common.mk 319include plat/arm/board/common/board_common.mk 320