History log of /rk3399_ARM-atf/plat/ (Results 8526 – 8550 of 8950)
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0892f6b607-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #583 from mtk09422/fix-build-error

mt8173: fix spm driver build errors

105b59e707-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #575 from soby-mathew/sm/new_tzc_driver

Refactor the TZC driver and add DMC-500 driver

5d29c76007-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #572 from jcastillo-arm/jc/tbb_nvcounter

TBB NVcounter support

3454fdea07-Apr-2016 yt.lee <yt.lee@mediatek.com>

mt8173: fix spm driver build errors

To fix build errors in following build conditions,
DEBUG=1 LOG_LEVEL<40
DEBUG=0 LOG_LEVEL>=40

Change-Id: Ib34aed07b2ae0abd8a3a46948adc9fbeaae715aa
Signed-off-by:

mt8173: fix spm driver build errors

To fix build errors in following build conditions,
DEBUG=1 LOG_LEVEL<40
DEBUG=0 LOG_LEVEL>=40

Change-Id: Ib34aed07b2ae0abd8a3a46948adc9fbeaae715aa
Signed-off-by: yt.lee <yt.lee@mediatek.com>

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c828440907-Mar-2016 Soren Brinkmann <soren.brinkmann@xilinx.com>

Add support for Xilinx Zynq UltraScale+ MPSOC

The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.

Signed-off-by: Soren Brinkmann <soren.b

Add support for Xilinx Zynq UltraScale+ MPSOC

The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

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61dbb02806-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #581 from rockchip-linux/rockchip-atf-20160405

Support for Rockchip's family SoCs

6fba6e0415-Jan-2016 Tony Xie <tony.xie@rock-chips.com>

Support for Rockchip's family SoCs

This patch adds to support the RK3368 and RK3399 SoCs.

RK3368/RK3399 is one of the Rockchip family SoCs, which is an
multi-cores ARM SoCs.

This patch adds suppor

Support for Rockchip's family SoCs

This patch adds to support the RK3368 and RK3399 SoCs.

RK3368/RK3399 is one of the Rockchip family SoCs, which is an
multi-cores ARM SoCs.

This patch adds support to boot the Trusted Firmware on RK3368/RK3399
SoCs, and adds support to boot secondary CPUs, enter/exit core
power states for all CPUs in the slow/fast clusters.

This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs)
* Support arm gicv2 & gicv3.
* Boot up multi-cores CPU.
* Add generic CPU helper functions.
* Support suspend/resume.
* Add system_off & system_reset implementation.
* Add delay timer platform implementation.
* Support the new porting interface for the PSCI implementation.

Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43
Signed-off-by: Tony Xie <tony.xie@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Shengfei xu <xsf@rock-chips.com>

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af711c1e04-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #580 from soby-mathew/sm/ret_type_plat_ns_ep

Modify return type of plat_get_ns_image_entrypoint()

21aa752d07-Mar-2016 Soren Brinkmann <soren.brinkmann@xilinx.com>

arm: common: Make timer configuration conditional

Make the timer configuration conditional on the optional interface being
available.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

a0ad601923-Mar-2016 Soby Mathew <soby.mathew@arm.com>

Modify return type of plat_get_ns_image_entrypoint()

This patch modifies the return type of the platform API
`plat_get_ns_image_entrypoint()` from `unsigned long` to
`uintptr_t` in accordance with t

Modify return type of plat_get_ns_image_entrypoint()

This patch modifies the return type of the platform API
`plat_get_ns_image_entrypoint()` from `unsigned long` to
`uintptr_t` in accordance with the coding guidelines.

Change-Id: Icb4510ca98b706aa4d535fe27e203394184fb4ca

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f501712501-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #576 from mtk09422/bl31-security

mt8173: Protect BL31 memory from non-secure access

a1e0c01f29-Mar-2016 Jimmy Huang <jimmy.huang@mediatek.com>

mt8173: Protect BL31 memory from non-secure access

BL31 usually handles confidential stuff, its memory must not be
read/write accessible from non-secure world. This patch protects
the BL31 memory ra

mt8173: Protect BL31 memory from non-secure access

BL31 usually handles confidential stuff, its memory must not be
read/write accessible from non-secure world. This patch protects
the BL31 memory range from non-secure read/write access.

Change-Id: I442fb92b667bb2f9a62d471a90508b1ba4489911
Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>

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618f0fee29-Jan-2016 Vikram Kanigiri <vikram.kanigiri@arm.com>

Add support to program a DMC-500 TZC on ARM platforms

This patch adds support to program TrustZone protection on ARM platforms that
implement a DMC-500. arm_dmc_500.c has been added which implements

Add support to program a DMC-500 TZC on ARM platforms

This patch adds support to program TrustZone protection on ARM platforms that
implement a DMC-500. arm_dmc_500.c has been added which implements the
arm_dmc_tzc_setup() function. This function relies on constants related to TZC
programming that are exported by each platform to program TrustZone protection
using the DMC-500 TrustZone controller driver. This function should be called
from plat_arm_security_setup() which is implemented by each platform.

Change-Id: I5400bdee9e4b29155fd11296a40693d512312f29

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57f7820126-Feb-2016 Soby Mathew <soby.mathew@arm.com>

Migrate ARM standard platforms to the refactored TZC driver

This patch migrates ARM Standard platforms to the refactored TZC driver.

Change-Id: I2a2f60b645f73e14d8f416740c4551cec87cb1fb

48279d5222-Jan-2016 Juan Castillo <juan.castillo@arm.com>

TBB: add non-volatile counter support

This patch adds support for non-volatile counter authentication to
the Authentication Module. This method consists of matching the
counter values provided in th

TBB: add non-volatile counter support

This patch adds support for non-volatile counter authentication to
the Authentication Module. This method consists of matching the
counter values provided in the certificates with the ones stored
in the platform. If the value from the certificate is lower than
the platform, the boot process is aborted. This mechanism protects
the system against rollback.

The TBBR CoT has been updated to include this method as part of the
authentication process. Two counters are used: one for the trusted
world images and another for the non trusted world images.

** NEW PLATFORM APIs (mandatory when TBB is enabled) **

int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr);

This API returns the non-volatile counter value stored
in the platform. The cookie in the first argument may be
used to select the counter in case the platform provides
more than one (i.e. TBSA compliant platforms must provide
trusted and non-trusted counters). This cookie is specified
in the CoT.

int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr);

This API sets a new counter value. The cookie may be
used to select the counter to be updated.

An implementation of these new APIs for ARM platforms is also
provided. The values are obtained from the Trusted Non-Volatile
Counters peripheral. The cookie is used to pass the extension OID.
This OID may be interpreted by the platform to know which counter
must return. On Juno, The trusted and non-trusted counter values
have been tied to 31 and 223, respectively, and cannot be modified.

** IMPORTANT **

THIS PATCH BREAKS THE BUILD WHEN TRUSTED_BOARD_BOOT IS ENABLED. THE
NEW PLATFORM APIs INTRODUCED IN THIS PATCH MUST BE IMPLEMENTED IN
ORDER TO SUCCESSFULLY BUILD TF.

Change-Id: Ic943b76b25f2a37f490eaaab6d87b4a8b3cbc89a

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4518dd9a07-Mar-2016 David Wang <david.wang@arm.com>

Add support to load BL31 in DRAM

This patch adds an option to the ARM common platforms to load BL31 in the
TZC secured DRAM instead of the default secure SRAM.

To enable this feature, set `ARM_BL31

Add support to load BL31 in DRAM

This patch adds an option to the ARM common platforms to load BL31 in the
TZC secured DRAM instead of the default secure SRAM.

To enable this feature, set `ARM_BL31_IN_DRAM` to 1 in build options.
If TSP is present, then setting this option also sets the TSP location
to DRAM and ignores the `ARM_TSP_RAM_LOCATION` build flag.

To use this feature, BL2 platform code must map in the DRAM used by
BL31. The macro ARM_MAP_BL31_SEC_DRAM is provided for this purpose.
Currently, only the FVP BL2 platform code maps in this DRAM.

Change-Id: If5f7cc9deb569cfe68353a174d4caa48acd78d67

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1c3ea10301-Feb-2016 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Remove all non-configurable dead loops

Added a new platform porting function plat_panic_handler, to allow
platforms to handle unexpected error situations. It must be
implemented in assembly as it ma

Remove all non-configurable dead loops

Added a new platform porting function plat_panic_handler, to allow
platforms to handle unexpected error situations. It must be
implemented in assembly as it may be called before the C environment
is initialized. A default implementation is provided, which simply
spins.

Corrected all dead loops in generic code to call this function
instead. This includes the dead loop that occurs at the end of the
call to panic().

All unnecesary wfis from bl32/tsp/aarch64/tsp_exceptions.S have
been removed.

Change-Id: I67cb85f6112fa8e77bd62f5718efcef4173d8134

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195d29f311-Mar-2016 danh-arm <dan.handley@arm.com>

Merge pull request #546 from mtk09422/mtk-bl31-update

Mtk bl31 update

b99d961c16-Nov-2015 Jimmy Huang <jimmy.huang@mediatek.com>

mt8173: support big core PLL control in system suspend flow

This patch adds big core ARMPLL control in system suspend flow.

Change-Id: I27a45dbbb360f17ff0b524a125630358ee2277e2
Signed-off-by: Louis

mt8173: support big core PLL control in system suspend flow

This patch adds big core ARMPLL control in system suspend flow.

Change-Id: I27a45dbbb360f17ff0b524a125630358ee2277e2
Signed-off-by: Louis Yu <louis.yu@mediatek.com>
Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>

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76d47fea04-Mar-2016 Jimmy Huang <jimmy.huang@mediatek.com>

mt8173: Remove gpio driver support

We no longer need to control power signal via gpio during system off,
thus remove gpio driver support from platform code.

Change-Id: I6dfec129fa163330951f37b45b71

mt8173: Remove gpio driver support

We no longer need to control power signal via gpio during system off,
thus remove gpio driver support from platform code.

Change-Id: I6dfec129fa163330951f37b45b71ba5b90355c3b
Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>

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e2a6595904-Mar-2016 Jimmy Huang <jimmy.huang@mediatek.com>

mt8173: Add #error directive to prevent RESET_TO_BL31

MT8173 platform code is incompatible with RESET_TO_BL31, add #error
directive to prevent the case.

We also move mt8173_def.h and plat_private.h

mt8173: Add #error directive to prevent RESET_TO_BL31

MT8173 platform code is incompatible with RESET_TO_BL31, add #error
directive to prevent the case.

We also move mt8173_def.h and plat_private.h to include directory, and
remove some unnecessary code.

Change-Id: I47b8d0a506820a4ea1fbe8c8fb0ec6c68d88feb5
Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>

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1a4fdb3626-Feb-2016 danh-arm <dan.handley@arm.com>

Merge pull request #533 from yatharth-arm/yk/genfw-1292

Fix the inconsistencies in bl1_tbbr_image_descs[]

843ddee401-Feb-2016 Yatharth Kochar <yatharth.kochar@arm.com>

Fix the inconsistencies in bl1_tbbr_image_descs[]

This patch fixes inconsistencies in bl1_tbbr_image_descs[]
and miscellaneous fixes in Firmware Update code.

Following are the changes:
* As part of

Fix the inconsistencies in bl1_tbbr_image_descs[]

This patch fixes inconsistencies in bl1_tbbr_image_descs[]
and miscellaneous fixes in Firmware Update code.

Following are the changes:
* As part of the original FWU changes, a `copied_size`
field was added to `image_info_t`. This was a subtle binary
compatibility break because it changed the size of the
`bl31_params_t` struct, which could cause problems if
somebody used different versions of BL2 or BL31, one with
the old `image_info_t` and one with the new version.
This patch put the `copied_size` within the `image_desc_t`.
* EXECUTABLE flag is now stored in `ep_info.h.attr` in place
of `image_info.h.attr`, associating it to an entrypoint.
* The `image_info.image_base` is only relevant for secure
images that are copied from non-secure memory into secure
memory. This patch removes initializing `image_base` for
non secure images in the bl1_tbbr_image_descs[].
* A new macro `SET_STATIC_PARAM_HEAD` is added for populating
bl1_tbbr_image_descs[].ep_info/image_info.h members statically.
The version, image_type and image attributes are now
populated using this new macro.
* Added PLAT_ARM_NVM_BASE and PLAT_ARM_NVM_SIZE to avoid direct
usage of V2M_FLASH0_XXX in plat/arm/common/arm_bl1_fwu.c.
* Refactoring of code/macros related to SECURE and EXECUTABLE flags.

NOTE: PLATFORM PORTS THAT RELY ON THE SIZE OF `image_info_t`
OR USE the "EXECUTABLE" BIT WITHIN `image_info_t.h.attr`
OR USE THEIR OWN `image_desc_t` ARRAY IN BL1, MAY BE
BROKEN BY THIS CHANGE. THIS IS CONSIDERED UNLIKELY.

Change-Id: Id4e5989af7bf0ed263d19d3751939da1169b561d

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9931932b22-Feb-2016 danh-arm <dan.handley@arm.com>

Merge pull request #532 from soby-mathew/vk/configure_mmap_macros

Rationalise MMU and Page table related constants on ARM platforms

c64a044820-Jan-2016 Vikram Kanigiri <vikram.kanigiri@arm.com>

Rationalise MMU and Page table related constants on ARM platforms

`board_arm_def.h` contains multiple definitions of
`PLAT_ARM_MMAP_ENTRIES` and `MAX_XLAT_TABLES` that are optimised for
memory usage

Rationalise MMU and Page table related constants on ARM platforms

`board_arm_def.h` contains multiple definitions of
`PLAT_ARM_MMAP_ENTRIES` and `MAX_XLAT_TABLES` that are optimised for
memory usage depending upon the chosen build configuration. To ease
maintenance of these constants, this patch replaces their multiple
definitions with a single set of definitions that will work on all ARM
platforms.

Platforms can override the defaults with optimal values by enabling the
`ARM_BOARD_OPTIMISE_MMAP` build option. An example has been provided in
the Juno ADP port.

Additionally, `PLAT_ARM_MMAP_ENTRIES` is increased by one to accomodate
future ARM platforms.

Change-Id: I5ba6490fdd1e118cc9cc2d988ad7e9c38492b6f0

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