| eb47f14d | 01-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1623 from MISL-EBU-System-SW/a3700-support
Add support for Armada 3700 and COMPHY porting layer |
| 1e66bacb | 08-Oct-2018 |
Konstantin Porotchkin <kostap@marvell.com> |
plat: marvell: Add support for Armada-37xx SoC platform
Add supprot for Marvell platforms based on Armada-37xx SoC. This includes support for the official Armada-3720 modular development board and E
plat: marvell: Add support for Armada-37xx SoC platform
Add supprot for Marvell platforms based on Armada-37xx SoC. This includes support for the official Armada-3720 modular development board and EspressoBin community board. The Armada-37xx SoC contains dual Cortex-A53 Application CPU, single secure CPU (Cortex-M3) and the following interfaces: - SATA 3.0 - USB 3.0 and USB 2.0 - PCIe - SDIO (supports boot from eMMC) - SPI - UART - I2c - Gigabit Ethernet
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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| d03823d4 | 31-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1650 from chandnich/sgiclark-ares-support
Sgiclark ares support |
| b3f7c42d | 31-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1655 from deepan02/deepak-arm/introduce-n1sdp
plat/arm: Introduce the N1SDP. |
| 318c2f97 | 31-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1646 from Andre-ARM/allwinner/pmic-v2
Allwinner/pmic v2 |
| cd3272ef | 31-Oct-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: add delay after eMMC initialized
It boots failure on CircuitCo HiKey board. The delay could fix the hang issue.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| ef202857 | 29-Oct-2018 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Remove use of ARM platform code
A recent patch[0] has made setting up page tables into generic code, complete the conversion for TI platforms by removing the use of plat_arm_get_mmap
ti: k3: common: Remove use of ARM platform code
A recent patch[0] has made setting up page tables into generic code, complete the conversion for TI platforms by removing the use of plat_arm_get_mmap() and using the mmap table directly.
[0] 0916c38deca4 ("Convert arm_setup_page_tables into a generic helper")
Signed-off-by: Andrew F. Davis <afd@ti.com>
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| 55dd52a3 | 30-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1652 from antonio-nino-diaz-arm/an/decouple-arm
poplar, warp7, ls1043: Decouple from plat/arm files |
| 6333e135 | 26-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
warp7, ls1043: Remove unneeded include paths
include/plat/arm/common isn't needed by them, and is removed to avoid dependency on Arm platform code.
Change-Id: Id9fccba33326fd075b3d1029bf1e4b012dfa0
warp7, ls1043: Remove unneeded include paths
include/plat/arm/common isn't needed by them, and is removed to avoid dependency on Arm platform code.
Change-Id: Id9fccba33326fd075b3d1029bf1e4b012dfa0483 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 0818e9e8 | 26-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
poplar: Decouple from plat/arm files
plat/arm files should only be used by Arm platforms. If other platforms use them, they create dependencies that can introduce problems when updating Arm platform
poplar: Decouple from plat/arm files
plat/arm files should only be used by Arm platforms. If other platforms use them, they create dependencies that can introduce problems when updating Arm platforms.
This patch copies the needed code from Arm platforms so that poplar can be independent from them.
Change-Id: I0b194f5bdb0377b8ccacbd400e021614c026c7fe Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| e6a90288 | 04-Oct-2018 |
Dai Okamura <okamura.dai@socionext.com> |
uniphier: revise SCP protocol handshake
When the SoC issues a command IRQ to SCP, SCP sets STMTOBEIRQ as ACK. The SoC must wait for it before issuing the next command.
This commit makes sure to mee
uniphier: revise SCP protocol handshake
When the SoC issues a command IRQ to SCP, SCP sets STMTOBEIRQ as ACK. The SoC must wait for it before issuing the next command.
This commit makes sure to meet the requirement.
Signed-off-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 8be7850f | 04-Oct-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: terminate boot if SCP_BL2 image is missing in SCP boot mode
Skipping SCP_BL2 image is just a temporary workaround. If on-chip SCP needs to work, BL2 should load the SCP_BL2 image.
Signed-
uniphier: terminate boot if SCP_BL2 image is missing in SCP boot mode
Skipping SCP_BL2 image is just a temporary workaround. If on-chip SCP needs to work, BL2 should load the SCP_BL2 image.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 15b94cc1 | 25-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Fix MISRA defects in SiP SVC handler
No functional changes.
Change-Id: I9b9f8d3dfde08d57706ad5450de6ff858a55ac01 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| 80d37c28 | 08-Aug-2018 |
Deepak Pandey <Deepak.Pandey@arm.com> |
plat/arm: Introduce the N1SDP.
This patch adds support for the N1SDP (NeoVerse N1 System Development Platform). It is an initial port and additional features are expected to be added later.
The por
plat/arm: Introduce the N1SDP.
This patch adds support for the N1SDP (NeoVerse N1 System Development Platform). It is an initial port and additional features are expected to be added later.
The port includes only BL31 support as the System Control Processor (SCP) is expected to take the role of primary boatloader
Change-Id: Ife17d8215a7bfcc1420204a72205e7ef920d0c10 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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| cf0886e2 | 29-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1644 from soby-mathew/sm/pie_proto
Position Indepedent Executable (PIE) Support |
| c38941f0 | 29-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1616 from antonio-nino-diaz-arm/an/gxbb
Initial port of Amlogic Meson S905 (GXBB) |
| fc922ca8 | 14-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
FVP: Enable PIE for RESET_TO_BL31=1
This patch enabled PIE for FVP when RESET_TO_BL31=1. The references to BL31_BASE are replaced by BL31_START as being a symbol exported by the linker, will create
FVP: Enable PIE for RESET_TO_BL31=1
This patch enabled PIE for FVP when RESET_TO_BL31=1. The references to BL31_BASE are replaced by BL31_START as being a symbol exported by the linker, will create a dynamic relocation entry in .rela.dyn and hence will be fixed up by dynamic linker at runtime. Also, we disable RECLAIM_INIT_CODE when PIE is enabled as the init section overlay creates some static relocations which cannot be handled by the dynamic linker currently.
Change-Id: I86df1b0a8b2a8bbbe7c3f3c0b9a08c86c2963ec0 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| bd83b396 | 12-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
plat/arm: Use `mov_imm` macro to load immediate values
This patch makes use of mov_imm macro where possible to load immediate values within ARM platform layer.
Change-Id: I02bc7fbc1fa334c9fccf76fbd
plat/arm: Use `mov_imm` macro to load immediate values
This patch makes use of mov_imm macro where possible to load immediate values within ARM platform layer.
Change-Id: I02bc7fbc1fa334c9fccf76fbddf515952f9a1298 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 6a7b3005 | 12-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Add helper to return reference to a symbol
This patch adds a utility function to return the address of a symbol. By default, the compiler generates adr/adrp instruction pair to return the reference
Add helper to return reference to a symbol
This patch adds a utility function to return the address of a symbol. By default, the compiler generates adr/adrp instruction pair to return the reference and this utility is used to override this compiler generated to code and use `ldr` instruction.
This is needed for Position Independent Executable when it needs to reference a symbol which is constant and does not depend on the execute address of the binary.
For example, on the FVP, the GICv3 register context is stored in a secure carveout (arm_el3_tzc_dram) within DDR and does not relocate with the BL image. Now if BL31 is executing at a different address other than the compiled address, using adrp/adr instructions to reference this memory will not work as they generate an address that is PC relative. The way to get around this problem is to reference it as non-PC relative (i.e non-relocatable location) via `ldr` instruction.
Change-Id: I5008a951b007144258121690afb68dc8e12ee6f7 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 0916c38d | 19-Oct-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Convert arm_setup_page_tables into a generic helper
This function is not related to Arm platforms and can be reused by other platforms if needed.
Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e
Convert arm_setup_page_tables into a generic helper
This function is not related to Arm platforms and can be reused by other platforms if needed.
Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 03987d01 | 19-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat: Fix compatibility between v1 and v2
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platf
xlat: Fix compatibility between v1 and v2
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platforms.
This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib v2 makefile. This way it is possible to detect from C code which version is being used and include the correct header.
The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and moved to a common folder. This way, when in doubt, this header can be used to guarantee compatibility, as it includes the correct header based on XLAT_TABLES_LIB_V2.
This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so that is now locked in xlat lib v2) and ZynqMP (where it was added as a workaround).
Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 253d1695 | 10-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
gxbb: Workaround for PSCI_CPU_OFF
There seems to be a problem where SCP can't turn CPU0 off. Instead of returning PSCI_E_DENIED or crashing make CPU0 wait in a WFE loop. This way all CPUs have a con
gxbb: Workaround for PSCI_CPU_OFF
There seems to be a problem where SCP can't turn CPU0 off. Instead of returning PSCI_E_DENIED or crashing make CPU0 wait in a WFE loop. This way all CPUs have a consistent behaviour from the point of view of the caller.
Change-Id: I5c8c266ca3b69c9e7a4f5ae70afeea5dd36a0825 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| d1bc7145 | 05-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
gxbb: Implement PSCI_CPU_OFF
This works fine for CPU1-3, but it fails for CPU0, where it is simply ignored and leaves CPU0 in a WFI loop.
Change-Id: I7d73683fdd894f2021d6a5bc2cce6cd03e18e633 Signed
gxbb: Implement PSCI_CPU_OFF
This works fine for CPU1-3, but it fails for CPU0, where it is simply ignored and leaves CPU0 in a WFI loop.
Change-Id: I7d73683fdd894f2021d6a5bc2cce6cd03e18e633 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| f3ff9f77 | 18-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
gxbb: Initial port of Amlogic Meson S905 (GXBB)
The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at 1.5Ghz. It also contains a Cortex-M3 used as SCP.
This port is a minimal i
gxbb: Initial port of Amlogic Meson S905 (GXBB)
The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at 1.5Ghz. It also contains a Cortex-M3 used as SCP.
This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux:
- Partial SCPI support. - Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF). - GICv2 driver set up. - Basic SIP services (read efuse data, enable/disable JTAG).
This port has been tested in an ODROID-C2.
Change-Id: Ia4bc82d7aca42a69d6b118b947279f82b3f6c6da Tested-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| b62b5b92 | 16-Sep-2018 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/arm/sgi: add support for SGI-Clark.Ares platform
SGI-Clark.Ares platform is a variant of the SGI-Clark platform. It has two clusters of four Ares CPUs each. Though very similar to the SGI575 pl
plat/arm/sgi: add support for SGI-Clark.Ares platform
SGI-Clark.Ares platform is a variant of the SGI-Clark platform. It has two clusters of four Ares CPUs each. Though very similar to the SGI575 platform, there are subtle differences. HW_CONFIG and TB_FW_CONFIG dts files have been added.
Change-Id: I740a33cbd1c3b1f1984cb56243b46ad379bab3e6 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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