feat(fvp): port event log to firmware handoff

Support handing off the event log to both the secure and non-secure
worlds using the firmware handoff framework. This also needs us to
increase the maxi

feat(fvp): port event log to firmware handoff

Support handing off the event log to both the secure and non-secure
worlds using the firmware handoff framework. This also needs us to
increase the maximum allocation for TB-FW configuration to accommodate
trusted boot entries.

Change-Id: I39d69d79434a366096dcf4fbdc5c434950170b78
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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feat(arm): port event log to firmware handoff

Support handing off the event log to both the secure and non-secure
worlds using the firmware handoff framework. This also needs us to
increase the maxi

feat(arm): port event log to firmware handoff

Support handing off the event log to both the secure and non-secure
worlds using the firmware handoff framework. This also needs us to
increase the maximum allocation for TB-FW configuration to accommodate
trusted boot entries.

Change-Id: I9f622b10c3cec2a9ab069f7848b00b1b635bd029
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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feat(fvp): increase bl2 mmap len for handoff

With firmware handoff and OP-TEE the BL2 translation tables need to be
one entry longer than they currently are. Increase the current max
length by this

feat(fvp): increase bl2 mmap len for handoff

With firmware handoff and OP-TEE the BL2 translation tables need to be
one entry longer than they currently are. Increase the current max
length by this much to allow to build these two configurations together.

Change-Id: Ibb7a62e1ded1aded072bc248a08f008f1b286c45
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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refactor(mediatek): refactor Mediatek options.mk

Replace the individual `$(eval $(call add_defined_option, ... ))` lines
with a single `DEFINED_OPTIONS` variable.

Change-Id: I20303248e7531b8c2d6d4d

refactor(mediatek): refactor Mediatek options.mk

Replace the individual `$(eval $(call add_defined_option, ... ))` lines
with a single `DEFINED_OPTIONS` variable.

Change-Id: I20303248e7531b8c2d6d4d6492a1b768f7f3fc5c
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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refactor(cpus): optimize CVE checking

This patch replaces the use of EXTRA functions
with using erratum entries check
to verify CVE mitigation application for some of
the SMCCC_ARCH_WORKAROUND_* cal

refactor(cpus): optimize CVE checking

This patch replaces the use of EXTRA functions
with using erratum entries check
to verify CVE mitigation application for some of
the SMCCC_ARCH_WORKAROUND_* calls.

Previously, EXTRA functions were individually implemented for
each SMCCC_ARCH_WORKAROUND_*, an approach that becomes unmanageable
with the increasing number of workarounds.
By looking up erratum entries for CVE check, the process is streamlined,
reducing overhead associated with creating and
maintaining EXTRA functions for each new workaround.

New Errata entries are created for SMC workarounds and
that is used to target cpus that are uniquely impacted
by SMC workarounds.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I873534e367a35c99461d0a616ff7bf856a0000af

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feat(versal-net): add SDEI support

Add basic SDEI support with following configuration settings:
- SGI 8 as the source IRQ.
- Special Private event 0.
- One private and shared dynamic event used in

feat(versal-net): add SDEI support

Add basic SDEI support with following configuration settings:
- SGI 8 as the source IRQ.
- Special Private event 0.
- One private and shared dynamic event used in tftf verification
for SDEI support.
- SDEI support is off by default.

Change-Id: I7cfafb84c3fc053ec67258698cf749e63486fe18
Signed-off-by: Amit Nagal <amit.nagal@amd.com>

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revert(rambus-trng): remove ip-76 driver

The Rambus TRNG IP-76 driver was ported from Linux kernel (omap-rng.c),
which was initially licensed under GPL-2.0. In term of the license
violation, remove

revert(rambus-trng): remove ip-76 driver

The Rambus TRNG IP-76 driver was ported from Linux kernel (omap-rng.c),
which was initially licensed under GPL-2.0. In term of the license
violation, remove this driver and the related SMC call that originally
added by the following two commits:

commit 57660d9d7945 ("plat/marvell/armada/a8k: support HW RNG by SMC")
commit 6aa9f5d164e8 ("drivers/rambus: add TRNG-IP-76 driver")

Change-Id: Id8c99db2e51b49623b3b034106c989a46f690b60
Signed-off-by: Wilson Ding <dingwei@marvell.com>

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feat(mt8189): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I6ca1552a6feb715834efcd6dc6c18a44bc299b34
Signed-off-by: Gavin Liu <gavin.liu@m

feat(mt8189): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I6ca1552a6feb715834efcd6dc6c18a44bc299b34
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>

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Merge "fix(imx8mp): apply ERRATA_A53_1530924 erratum" into integration

Merge "feat(mt8196): show ERROR log if need" into integration

feat(mt8196): enable IRQ configuration

Enable IRQ configuration to add additional wake-up source to wake up the
SPM.

Change-Id: Id85c74c91801de0617fda104f2beb02f8bf8ef6c
Signed-off-by: Gavin Liu <g

feat(mt8196): enable IRQ configuration

Enable IRQ configuration to add additional wake-up source to wake up the
SPM.

Change-Id: Id85c74c91801de0617fda104f2beb02f8bf8ef6c
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>

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Merge changes I06a7d5b7,I8a39252f into integration

* changes:
feat(mt8189): enable cirq for Mediatek MT8189
feat(mt8189): add GIC driver on MT8189

Merge changes from topic "s32g274a/sd_mov_imm_fixes" into integration

* changes:
fix(s32g274a): reduce the uSDHC clock to 200MHz
refactor(s32g274a): replace mov/movk with mov_imm

feat(mt8189): enable cirq for Mediatek MT8189

- Add CIRQ related information

Change-Id: I06a7d5b71d7e3619db3a8b881788f7625356886a
Signed-off-by: ot_chhao.chang <ot_chhao.chang@mediatek.com>

feat(mt8189): add GIC driver on MT8189

- Add GIC driver and platform configuration.

Change-Id: I8a39252f79752dab1133035750e235962452829c
Signed-off-by: Runyang Chen <runyang.chen@mediatek.corp-part

feat(mt8189): add GIC driver on MT8189

- Add GIC driver and platform configuration.

Change-Id: I8a39252f79752dab1133035750e235962452829c
Signed-off-by: Runyang Chen <runyang.chen@mediatek.corp-partner.google.com>

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feat(mt8196): show ERROR log if need

There are two purposes for hardware semaphores. The first one is for
the SMMU to check the NPU power status, and the second one is for NPU
power control.

In the

feat(mt8196): show ERROR log if need

There are two purposes for hardware semaphores. The first one is for
the SMMU to check the NPU power status, and the second one is for NPU
power control.

In the case of the SMMU, if the hardware semaphore cannot be locked
immediately, it means the NPU is powered off, and simply returning
-EBUSY is sufficient.

Hence, there is no need to show any ERROR message for the SMMU case.
(retry_times == HW_SEM_NO_WAIT)

Change-Id: I1a0b6c16e297c7564518883863ebc67e38b6561a
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>

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Merge "refactor(mediatek): remove unused topology version" into integration

feat(st): adapt .stm32 file creation for clang

The LLVM/clang linker (ld.lld) does not genrate the same map file as
GCC. Adapt the commands to retrieve the load address and entry point
from this new

feat(st): adapt .stm32 file creation for clang

The LLVM/clang linker (ld.lld) does not genrate the same map file as
GCC. Adapt the commands to retrieve the load address and entry point
from this new file.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I54d18f01a96f14f2dc6d5844dc1e8085220706ae

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feat(st): adapt stm32 linker scripts for clang

With Clang, the address inside a section does not seem relative to its
start address. Use ABSOLUTE keyword for those addresses.
For stm32 binary contai

feat(st): adapt stm32 linker scripts for clang

With Clang, the address inside a section does not seem relative to its
start address. Use ABSOLUTE keyword for those addresses.
For stm32 binary containing BL2 and its DT, we can use that as PIE is
not used (either disabled or used with BL2_IN_XIP_MEM).
This is still working with GCC.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4e06c8a72c41370695db27fb6c52414487dfae47

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feat(st): update stm32 linker scripts

Remove an extra dot for the .data section.
Use FILL(0) instead of *(.data*). There is nothing there matching this
expression and was just use to have a filler.

feat(st): update stm32 linker scripts

Remove an extra dot for the .data section.
Use FILL(0) instead of *(.data*). There is nothing there matching this
expression and was just use to have a filler. Use explicit FILL(0)
instead.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib5fc7dcdfe2b34b6892602512b8ae4115d45f307

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fix(st): mark INCBIN-generated sections as SHF_ALLOC

This is the same as rk3399 patch[1], add "a" option for sections
added to create stm32 file (containing BL2 and its DTB) in order to
properly lin

fix(st): mark INCBIN-generated sections as SHF_ALLOC

This is the same as rk3399 patch[1], add "a" option for sections
added to create stm32 file (containing BL2 and its DTB) in order to
properly link with clang.
This is still working with GCC.

[1]: 279cad8ed3 fix(rk3399): mark INCBIN-generated sections as SHF_ALLOC

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Id5db55580c9c156aa6bf616c7c09a9307bca85f9

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feat(st): remove unsupported option for clang

Clang supports -Wformat-signedness starting from version 19. As it is
not yet very deployed, enable the warning only for GCC.

Signed-off-by: Yann Gauti

feat(st): remove unsupported option for clang

Clang supports -Wformat-signedness starting from version 19. As it is
not yet very deployed, enable the warning only for GCC.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib941a04a64b62402a5d47c561530912c62f29838

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Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration

* changes:
chore: fix preprocessor checks
refactor: convert arm platforms to use the generic GIC driver
refacto

Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration

* changes:
chore: fix preprocessor checks
refactor: convert arm platforms to use the generic GIC driver
refactor(gic): promote most of the GIC driver to common code
refactor: make arm_gicv2.c and arm_gicv3.c common
refactor(fvp): use more arm generic code for gicv3

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refactor(mediatek): remove unused topology version

Remove the topology/armv9 directory as it is no longer in use. The
current ARM v9 platform now utilizes topology/group_4_3_1.

Change-Id: I5fd0266b

refactor(mediatek): remove unused topology version

Remove the topology/armv9 directory as it is no longer in use. The
current ARM v9 platform now utilizes topology/group_4_3_1.

Change-Id: I5fd0266bb3320b5273bfd3b5ecffbfc90fb19664
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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chore: fix preprocessor checks

We can also drop the preprocessor check from plat_gic_init - it was
introduced because the tsp needed to call this function on gicv2 but not
gicv3 and this was the cle

chore: fix preprocessor checks

We can also drop the preprocessor check from plat_gic_init - it was
introduced because the tsp needed to call this function on gicv2 but not
gicv3 and this was the cleanest way to filter this out. Now that we have
the generic driver, the caller has all the tools to cater for this.
Callers have been converted so this is redundant.

Also, the FVP observes different behaviour on debug and release builds
in regards to the contents of plat_params_from_bl2. Make this explicit
so that release builds with ENABLE_ASSERTIONS=1 are possible.

Change-Id: I86959e67460d0c25c558f33c08e6233a8b6eeb7f
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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