1STM32MP2 2======== 3 4STM32MP2 is a microprocessor designed by STMicroelectronics 5based on Arm Cortex-A35. 6 7More information can be found on `STM32MP2 Series`_ page. 8 9For TF-A common configuration of STM32 MPUs, please check 10:ref:`STM32 MPUs` page. 11 12STM32MP2 Versions 13----------------- 14 15Here are the variants for STM32MP2: 16- STM32MP21 17- STM32MP25 18 19STM32MP21 Versions 20~~~~~~~~~~~~~~~~~~ 21The STM32MP21 series is available in 3 different lines which are pin-to-pin compatible: 22 23- STM32MP215: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD - CSI - LTDC 24- STM32MP213: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD 25- STM32MP211: Single Cortex-A35 + Cortex-M33 - 1x Ethernet 26 27Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 28 29- A Basic + Cortex-A35 @ 1.2GHz 30- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz 31- D Basic + Cortex-A35 @ 1.5GHz 32- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz 33 34STM32MP25 Versions 35~~~~~~~~~~~~~~~~~~ 36The STM32MP25 series is available in 4 different lines which are pin-to-pin compatible: 37 38- STM32MP257: Dual Cortex-A35 cores, Cortex-M33 core - 3x Ethernet (2+1 switch) - 3x CAN FD – H264 - 3D GPU – AI / NN - LVDS 39- STM32MP255: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - H264 - 3D GPU – AI / NN - LVDS 40- STM32MP253: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - LVDS 41- STM32MP251: Single Cortex-A35 core, Cortex-M33 core - 1x Ethernet 42 43Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 44 45- A Basic + Cortex-A35 @ 1.2GHz 46- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz 47- D Basic + Cortex-A35 @ 1.5GHz 48- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz 49 50The `STM32MP2 part number codification`_ page gives more information about part numbers. 51 52Memory mapping 53-------------- 54 55:: 56 57 0x00000000 +-----------------+ 58 | | 59 | ... | 60 | | 61 0x0E000000 +-----------------+ \ 62 | BL31 | | 63 +-----------------+ | 64 | ... | | 65 0x0E012000 +-----------------+ | 66 | BL2 DTB | | Embedded SRAM 67 0x0E016000 +-----------------+ | 68 | BL2 | | 69 0x0E040000 +-----------------+ / 70 | | 71 | ... | 72 | | 73 0x40000000 +-----------------+ 74 | | 75 | | Devices 76 | | 77 0x80000000 +-----------------+ \ 78 | | | 79 | | | Non-secure RAM (DDR) 80 | | | 81 0xFFFFFFFF +-----------------+ / 82 83 84Build Instructions 85------------------ 86 87STM32MP2x specific flags 88~~~~~~~~~~~~~~~~~~~~~~~~ 89 90Dedicated STM32MP2 build flags: 91 92- | ``STM32MP_DDR_FIP_IO_STORAGE``: to store DDR firmware in FIP. 93 | Default: 1 94- | ``STM32MP21``: to select STM32MP21 variant configuration. 95 | Default: 0 96- | ``STM32MP25``: to select STM32MP25 variant configuration. 97 | Default: 1 98 99To compile the correct DDR driver, one flag must be set among: 100 101- | ``STM32MP_DDR3_TYPE``: to compile DDR3 driver and DT. 102 | Default: 0 103- | ``STM32MP_DDR4_TYPE``: to compile DDR4 driver and DT. 104 | Default: 0 105- | ``STM32MP_LPDDR4_TYPE``: to compile LpDDR4 driver and DT. 106 | Default: 0 107 108 109Boot with FIP 110~~~~~~~~~~~~~ 111You need to build BL2, BL31, BL32 (OP-TEE) and BL33 (U-Boot) and retrieve 112DDR PHY firmware before building FIP binary. 113 114U-Boot 115______ 116 117.. code:: bash 118 119 cd <u-boot_directory> 120 make stm32mp25_defconfig 121 make DEVICE_TREE=stm32mp257f-ev1 all 122 123OP-TEE 124______ 125 126.. code:: bash 127 128 cd <optee_directory> 129 make CROSS_COMPILE64=aarch64-none-elf- CROSS_COMPILE32=arm-none-eabi- 130 ARCH=arm PLATFORM=stm32mp2 \ 131 CFG_EMBED_DTB_SOURCE_FILE=stm32mp257f-ev1.dts 132 133DDR PHY firmware 134________________ 135DDR PHY firmware files may not be delivered inside TF-A repository, especially 136if you build directly from trustedfirmware.org repository. It then needs to be 137retrieved from `STMicroelectronics DDR PHY github`_. 138 139You can either clone the repository to the default directory: 140 141.. code:: bash 142 143 git clone https://github.com/STMicroelectronics/stm32-ddr-phy-binary.git drivers/st/ddr/phy/firmware/bin 144 145Or clone it somewhere else, and add ``STM32MP_DDR_FW_PATH=`` in your make command 146line when building FIP. 147 148TF-A BL2 149________ 150To build TF-A BL2 with its STM32 header for SD-card boot: 151 152.. code:: bash 153 154 make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \ 155 STM32MP_DDR4_TYPE=1 SPD=opteed \ 156 DTB_FILE_NAME=stm32mp257f-ev1.dtb STM32MP_SDMMC=1 157 158For other boot devices, you have to replace STM32MP_SDMMC in the previous command 159with the desired device flag. 160 161 162FIP 163___ 164 165.. code:: bash 166 167 make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \ 168 STM32MP_DDR4_TYPE=1 SPD=opteed \ 169 DTB_FILE_NAME=stm32mp257f-ev1.dtb \ 170 BL33=<u-boot_directory>/u-boot-nodtb.bin \ 171 BL33_CFG=<u-boot_directory>/u-boot.dtb \ 172 BL32=<optee_directory>/tee-header_v2.bin \ 173 BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin 174 fip 175 176.. _STM32MP2 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html 177.. _STM32MP2 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP25_microprocessor#Part_number_codification 178.. _STMicroelectronics DDR PHY github: https://github.com/STMicroelectronics/stm32-ddr-phy-binary 179 180*Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved* 181