1# 2# Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Extra partitions used to find FIP, contains: 8# metadata (2) and fsbl-m (2) and the FIP partitions (default is 2). 9STM32_EXTRA_PARTS := 6 10 11include plat/st/common/common.mk 12 13CRASH_REPORTING := 1 14# Disable PIE by default. To re-enable it, uncomment next line. 15#ENABLE_PIE := 1 16PROGRAMMABLE_RESET_ADDRESS := 1 17ifeq ($(ENABLE_PIE),1) 18BL2_IN_XIP_MEM := 1 19endif 20 21STM32MP_BL33_EL1 ?= 1 22ifeq ($(STM32MP_BL33_EL1),1) 23INIT_UNUSED_NS_EL2 := 1 24endif 25 26# Disable features unsupported in ARMv8.0 27ENABLE_SPE_FOR_NS := 0 28ENABLE_SVE_FOR_NS := 0 29 30# Default Device tree 31DTB_FILE_NAME ?= stm32mp257f-ev1.dtb 32 33STM32MP21 ?= 0 34STM32MP23 ?= 0 35STM32MP25 ?= 0 36 37ifneq ($(findstring stm32mp21,$(DTB_FILE_NAME)),) 38STM32MP21 := 1 39endif 40ifneq ($(findstring stm32mp23,$(DTB_FILE_NAME)),) 41STM32MP23 := 1 42endif 43ifneq ($(findstring stm32mp25,$(DTB_FILE_NAME)),) 44STM32MP25 := 1 45endif 46ifneq ($(filter 1,$(STM32MP21) $(STM32MP23) $(STM32MP25)), 1) 47$(warning STM32MP21=$(STM32MP21)) 48$(warning STM32MP23=$(STM32MP23)) 49$(warning STM32MP25=$(STM32MP25)) 50$(warning DTB_FILE_NAME=$(DTB_FILE_NAME)) 51$(error Cannot enable more than one STM32MP2x flag) 52endif 53 54# STM32 image header version v2.2 or v2.3 for STM32MP21 55STM32_HEADER_VERSION_MAJOR := 2 56ifeq ($(STM32MP21),1) 57STM32_HEADER_VERSION_MINOR := 3 58else 59STM32_HEADER_VERSION_MINOR := 2 60endif 61 62# Set load address for serial boot devices 63DWL_BUFFER_BASE ?= 0x87000000 64 65# DDR types 66STM32MP_DDR3_TYPE ?= 0 67STM32MP_DDR4_TYPE ?= 0 68STM32MP_LPDDR4_TYPE ?= 0 69ifeq (${STM32MP_DDR3_TYPE},1) 70DDR_TYPE := ddr3 71endif 72ifeq (${STM32MP_DDR4_TYPE},1) 73DDR_TYPE := ddr4 74endif 75ifeq (${STM32MP_LPDDR4_TYPE},1) 76DDR_TYPE := lpddr4 77endif 78 79# DDR features 80STM32MP_DDR_DUAL_AXI_PORT := 1 81STM32MP_DDR_FIP_IO_STORAGE := 1 82 83# Device tree 84BL2_DTSI := stm32mp25-bl2.dtsi 85FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) 86BL31_DTSI := stm32mp25-bl31.dtsi 87FDT_SOURCES += $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl31.dts,$(DTB_FILE_NAME))) 88 89# Macros and rules to build TF binary 90STM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME))) 91STM32_LD_FILE := plat/st/stm32mp2/${ARCH}/stm32mp2.ld.S 92STM32_BINARY_MAPPING := plat/st/stm32mp2/${ARCH}/stm32mp2.S 93 94STM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME)) 95STM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME) 96STM32MP_SOC_FW_CONFIG := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl31.dtb,$(DTB_FILE_NAME))) 97ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1) 98STM32MP_DDR_FW_PATH ?= drivers/st/ddr/phy/firmware/bin/stm32mp2 99STM32MP_DDR_FW_NAME := ${DDR_TYPE}_pmu_train.bin 100STM32MP_DDR_FW := ${STM32MP_DDR_FW_PATH}/${STM32MP_DDR_FW_NAME} 101endif 102FDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME))) 103 104# Add the FW_CONFIG to FIP and specify the same to certtool 105$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config)) 106 107# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 108$(eval $(call TOOL_ADD_IMG_PAYLOAD,STM32MP_SOC_FW_CONFIG,$(STM32MP_SOC_FW_CONFIG),--soc-fw-config,$(patsubst %.dtb,%.dts,$(STM32MP_SOC_FW_CONFIG)))) 109 110ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1) 111# Add the FW_DDR to FIP and specify the same to certtool 112$(eval $(call TOOL_ADD_IMG,STM32MP_DDR_FW,--ddr-fw)) 113endif 114 115# Ultratronik Specific Boards 116ifeq ($(findstring ultra-fly,$(DTB_FILE_NAME)),ultra-fly) 117ULTRA_FLY := 1 118$(eval $(call assert_booleans,\ 119 $(sort \ 120 ULTRA_FLY \ 121 ))) 122$(eval $(call add_defines,\ 123 $(sort \ 124 ULTRA_FLY \ 125 ))) 126endif 127 128# Enable flags for C files 129$(eval $(call assert_booleans,\ 130 $(sort \ 131 STM32MP_DDR_DUAL_AXI_PORT \ 132 STM32MP_DDR_FIP_IO_STORAGE \ 133 STM32MP_DDR3_TYPE \ 134 STM32MP_DDR4_TYPE \ 135 STM32MP_LPDDR4_TYPE \ 136 STM32MP21 \ 137 STM32MP23 \ 138 STM32MP25 \ 139 STM32MP_BL33_EL1 \ 140))) 141 142$(eval $(call assert_numerics,\ 143 $(sort \ 144 PLAT_PARTITION_MAX_ENTRIES \ 145 STM32_HEADER_VERSION_MAJOR \ 146 STM32_TF_A_COPIES \ 147))) 148 149$(eval $(call add_defines,\ 150 $(sort \ 151 DWL_BUFFER_BASE \ 152 PLAT_DEF_FIP_UUID \ 153 PLAT_PARTITION_MAX_ENTRIES \ 154 PLAT_TBBR_IMG_DEF \ 155 STM32_TF_A_COPIES \ 156 STM32MP_DDR_DUAL_AXI_PORT \ 157 STM32MP_DDR_FIP_IO_STORAGE \ 158 STM32MP_DDR3_TYPE \ 159 STM32MP_DDR4_TYPE \ 160 STM32MP_LPDDR4_TYPE \ 161 STM32MP21 \ 162 STM32MP23 \ 163 STM32MP25 \ 164 STM32MP_BL33_EL1 \ 165))) 166 167# STM32MP2x is based on Cortex-A35, which is Armv8.0, and does not support BTI 168# Disable mbranch-protection to avoid adding useless code 169TF_CFLAGS += -mbranch-protection=none 170 171# Include paths and source files 172PLAT_INCLUDES += -Iplat/st/stm32mp2/include/ 173PLAT_INCLUDES += -Idrivers/st/ddr/phy/phyinit/include/ 174PLAT_INCLUDES += -Idrivers/st/ddr/phy/firmware/include/ 175 176PLAT_BL_COMMON_SOURCES += lib/cpus/${ARCH}/cortex_a35.S 177PLAT_BL_COMMON_SOURCES += drivers/st/uart/${ARCH}/stm32_console.S 178PLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/${ARCH}/stm32mp2_helper.S 179 180PLAT_BL_COMMON_SOURCES += drivers/st/pmic/stm32mp_pmic2.c \ 181 drivers/st/pmic/stpmic2.c \ 182 183PLAT_BL_COMMON_SOURCES += drivers/st/i2c/stm32_i2c.c 184 185PLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/stm32mp2_private.c 186 187PLAT_BL_COMMON_SOURCES += drivers/st/bsec/bsec3.c \ 188 drivers/st/reset/stm32mp2_reset.c \ 189 plat/st/stm32mp2/stm32mp2_syscfg.c 190 191PLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \ 192 drivers/st/clk/clk-stm32mp2.c 193 194BL2_SOURCES += plat/st/stm32mp2/plat_bl2_mem_params_desc.c 195 196BL2_SOURCES += plat/st/stm32mp2/bl2_plat_setup.c \ 197 plat/st/stm32mp2/plat_ddr.c 198 199ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),) 200BL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c 201endif 202 203ifeq (${STM32MP_USB_PROGRAMMER},1) 204BL2_SOURCES += plat/st/stm32mp2/stm32mp2_usb_dfu.c 205endif 206 207BL2_SOURCES += drivers/st/ddr/stm32mp2_ddr.c \ 208 drivers/st/ddr/stm32mp2_ddr_helpers.c \ 209 drivers/st/ddr/stm32mp2_ram.c 210 211BL2_SOURCES += drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_c_initphyconfig.c \ 212 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_calcmb.c \ 213 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_i_loadpieimage.c \ 214 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_initstruct.c \ 215 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_isdbytedisabled.c \ 216 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_loadpieprodcode.c \ 217 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_mapdrvstren.c \ 218 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_progcsrskiptrain.c \ 219 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_reginterface.c \ 220 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_restore_sequence.c \ 221 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_sequence.c \ 222 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_softsetmb.c \ 223 drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_custompretrain.c \ 224 drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_saveretregs.c 225 226BL2_SOURCES += drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_d_loadimem.c \ 227 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_f_loaddmem.c \ 228 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_g_execfw.c \ 229 drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_writeoutmem.c \ 230 drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_g_waitfwdone.c 231 232# BL31 sources 233BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 234 235BL31_SOURCES += plat/st/stm32mp2/bl31_plat_setup.c \ 236 plat/st/stm32mp2/stm32mp2_pm.c \ 237 plat/st/stm32mp2/stm32mp2_topology.c 238# Generic GIC v2 239include drivers/arm/gic/v2/gicv2.mk 240 241BL31_SOURCES += ${GICV2_SOURCES} \ 242 plat/common/plat_gicv2.c \ 243 plat/st/common/stm32mp_gic.c 244 245# Generic PSCI 246BL31_SOURCES += plat/common/plat_psci_common.c 247 248BL31_SOURCES += plat/st/common/stm32mp_svc_setup.c \ 249 plat/st/stm32mp2/services/stgen_svc.c \ 250 plat/st/stm32mp2/services/stm32mp2_svc_setup.c 251 252# Arm Archtecture services 253BL31_SOURCES += services/arm_arch_svc/arm_arch_svc_setup.c 254 255# Compilation rules 256.PHONY: check_ddr_type 257bl2: check_ddr_type 258 259check_ddr_type: 260 $(eval DDR_TYPE = $(shell echo $$(($(STM32MP_DDR3_TYPE) + \ 261 $(STM32MP_DDR4_TYPE) + \ 262 $(STM32MP_LPDDR4_TYPE))))) 263 @if [ ${DDR_TYPE} != 1 ]; then \ 264 echo "One and only one DDR type must be defined"; \ 265 false; \ 266 fi 267 268# Create DTB file for BL31 269${BUILD_PLAT}/fdts/%-bl31.dts: fdts/%.dts fdts/${BL31_DTSI} | $$(@D)/ 270 @echo '#include "$(patsubst fdts/%,%,$<)"' > $@ 271 @echo '#include "${BL31_DTSI}"' >> $@ 272 273include plat/st/common/common_rules.mk 274