History log of /rk3399_ARM-atf/plat/ (Results 6226 – 6250 of 8950)
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1f46197920-Aug-2019 Justin Chadwell <justin.chadwell@arm.com>

Add UBSAN support and handlers

This patch adds support for the Undefined Behaviour sanitizer. There are
two types of support offered - minimalistic trapping support which
essentially immediately cra

Add UBSAN support and handlers

This patch adds support for the Undefined Behaviour sanitizer. There are
two types of support offered - minimalistic trapping support which
essentially immediately crashes on undefined behaviour and full support
with full debug messages.

The full support relies on ubsan.c which has been adapted from code used
by OPTEE.

Change-Id: I417c810f4fc43dcb56db6a6a555bfd0b38440727
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>

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705bed5d27-Aug-2019 Jolly Shah <jolly.shah@xilinx.com>

plat: xilinx: zynqmp: Initialize IPI table from zynqmp_config_setup()

Common ipi_table needs to be initialized before using any
IPI command (i.e send/receive). Move zynqmp ipi config table
initializ

plat: xilinx: zynqmp: Initialize IPI table from zynqmp_config_setup()

Common ipi_table needs to be initialized before using any
IPI command (i.e send/receive). Move zynqmp ipi config table
initialization from sip_svc_setup() to zynqmp_config_setup().

Change-Id: Ic8aaa0728a43936cd4c6e1ed590e01ba8f0fbf5b
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>

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ebf851ed04-Sep-2019 Yann Gautier <yann.gautier@st.com>

stm32mp1: manage CONSOLE_FLAG_TRANSLATE_CRLF and cleanup driver

The STM32 console driver was pre-pending '\r' before '\n'.
It is now managed by the framework with the flag:
CONSOLE_FLAG_TRANSLATE_CR

stm32mp1: manage CONSOLE_FLAG_TRANSLATE_CRLF and cleanup driver

The STM32 console driver was pre-pending '\r' before '\n'.
It is now managed by the framework with the flag:
CONSOLE_FLAG_TRANSLATE_CRLF.
Remove the code in driver, and add the flag for STM32MP1.

Change-Id: I5d0d5d5c4abee0b7dc11c2f8707b1b5cf10149ab
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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0289ab9e10-Sep-2019 Soby Mathew <soby.mathew@arm.com>

Merge changes from topic "yg/stm32mp1_wdg_updates" into integration

* changes:
mmc: stm32_sdmmc2: correctly manage block size
mmc: stm32_sdmmc2: manage max-frequency property from DT
stm32mp1:

Merge changes from topic "yg/stm32mp1_wdg_updates" into integration

* changes:
mmc: stm32_sdmmc2: correctly manage block size
mmc: stm32_sdmmc2: manage max-frequency property from DT
stm32mp1: move check_header() to common code
stm32mp1: keep console during runtime
stm32mp1: sp_min: initialize MMU and cache earlier
stm32mp1: add support for LpDDR3
stm32mp1: use a common function to check spinlock is available
clk: stm32mp: enable RTCAPB clock for dual-core chips
stm32mp1: check if the SoC is single core
stm32mp1: print information about board
stm32mp1: print information about SoC
stm32mp1: add watchdog support

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0d8cb49302-May-2019 Hung-Te Lin <hungte@chromium.org>

mediatek: mt8183: Support coreboot configuration

When built for coreboot, we want to enable coreboot library to have
better integration. For example, serial console should be initialized by
coreboot

mediatek: mt8183: Support coreboot configuration

When built for coreboot, we want to enable coreboot library to have
better integration. For example, serial console should be initialized by
coreboot_serial instead of hard-coded values.

Most coreboot configuration will enable memory console, which needs
larger XLAT_TABLES so MAX_XLAT_TABLES is increased; and to support that,
TZRAM_SIZE also need to be enlarged.

Change-Id: I08cf22df2fa26e48284e323d22ad8ce73a6ea803
Signed-off-by: Hung-Te Lin <hungte@chromium.org>

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3d91c9c303-May-2019 kenny liang <kenny.liang@mediatek.com>

mediatek: mt8183: support system reset

Implement system reset handler.

Change-Id: I535ee414616dde8d2b59dec5a723a540a3a1341d
Signed-off-by: kenny liang <kenny.liang@mediatek.com>

a561205703-May-2019 kenny liang <kenny.liang@mediatek.com>

mediatek: mt8183: pass platform parameters

Add plat parameter structs to support BL2 to pass
variable-length, variable-type parameters to BL31.
The parameters are structured as a link list.
During B

mediatek: mt8183: pass platform parameters

Add plat parameter structs to support BL2 to pass
variable-length, variable-type parameters to BL31.
The parameters are structured as a link list.
During BL31 setup time, we traverse the list to process
each parameter.

Signed-off-by: kenny liang <kenny.liang@mediatek.com>
Change-Id: Ie84cfc9606656fb1d2780a68cadf27e09afa6628

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50cd952202-May-2019 kenny liang <kenny.liang@mediatek.com>

mediatek: mt8183: add GPIO driver

Add GPIO driver.

Change-Id: I8c35ce4ea247f3726081b0bbb95f0930c2b82517
Signed-off-by: kenny liang <kenny.liang@mediatek.com>

e977b4db02-May-2019 kenny liang <kenny.liang@mediatek.com>

mediatek: mt8183: support system off

- Add PMIC driver
- Add RTC drvier
- Refactor PMIC and RTC to mediatek/common
- Implement system off handler

Change-Id: If76497646ace1b78bc9a5fa0110b652fe512281

mediatek: mt8183: support system off

- Add PMIC driver
- Add RTC drvier
- Refactor PMIC and RTC to mediatek/common
- Implement system off handler

Change-Id: If76497646ace1b78bc9a5fa0110b652fe512281a
Signed-off-by: kenny liang <kenny.liang@mediatek.com>

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7352f32902-May-2019 kenny liang <kenny.liang@mediatek.com>

mediatek: mt8183: support CPU hotplug

- Add DCM driver
- Add SPMC driver
- Implement core and cluster power on/off handlers

Change-Id: I902002f8ea6f98fd73bf259188162b10d3939c72
Signed-off-by: kenny

mediatek: mt8183: support CPU hotplug

- Add DCM driver
- Add SPMC driver
- Implement core and cluster power on/off handlers

Change-Id: I902002f8ea6f98fd73bf259188162b10d3939c72
Signed-off-by: kenny liang <kenny.liang@mediatek.com>

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f992b96025-Jun-2019 kenny liang <kenny.liang@mediatek.com>

mediatek: mt8183: refine GIC driver

Refine MTK GIC driver.
Remove unused codes.

Signed-off-by: kenny liang <kenny.liang@mediatek.com>
Change-Id: I39e05ce7aa3c257e237fbc8e661cdde65cbcec7c

36bf55d605-Sep-2019 Varun Wadekar <vwadekar@nvidia.com>

Tegra: memctrl_v2: fix "overflow before widen" coverity issue

This patch fixes a coding error, where the size of the protected memory area
was truncated due to an incorrect typecast.

This defect wa

Tegra: memctrl_v2: fix "overflow before widen" coverity issue

This patch fixes a coding error, where the size of the protected memory area
was truncated due to an incorrect typecast.

This defect was found by coverity and reported as CID 336781.

Change-Id: I41878b0a9a5e5cd78ef3393fdc7b9ea7f7403ed3
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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9158854a28-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the SoC specific files

Remove the GXBB prefix where needed and add SoC specific prefixes for
GXBB/GXL.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic3eb3a

amlogic: Fix prefixes in the SoC specific files

Remove the GXBB prefix where needed and add SoC specific prefixes for
GXBB/GXL.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic3eb3a77ca2d9c779a9dee5cee786e9c16ecdb27

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0e1d789628-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the PM code

Remove the GXBB prefix from the code in the common directory and add
SoC-specific prefixes in the SoC specific code.

Signed-off-by: Carlo Caione <ccaione@baylib

amlogic: Fix prefixes in the PM code

Remove the GXBB prefix from the code in the common directory and add
SoC-specific prefixes in the SoC specific code.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic983ef70b0ef23f95088dd8df488d8c42c3bc030

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9a5616fa28-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the SCPI related code

Add a new aml_* prefix to the SCPI related function calls.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I697812ac1c0df28cbb639a1dc3e8

amlogic: Fix prefixes in the SCPI related code

Add a new aml_* prefix to the SCPI related function calls.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I697812ac1c0df28cbb639a1dc3e838f1107fb739

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cbaad53328-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the MHU code

Make the MHU code AML specific adding a new aml_* prefix and remove the
GXBB prefix from the register names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the MHU code

Make the MHU code AML specific adding a new aml_* prefix and remove the
GXBB prefix from the register names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I8f20918e29f08542bd71bd679f88e65b4efaa7d2

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381b901f26-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the SIP/SVC code

All the SIP/SVC related code is currently the same between GXL and GXBB.
Rename function names and register names to avoid hardcoding the GXBB
prefix.

Sign

amlogic: Fix prefixes in the SIP/SVC code

All the SIP/SVC related code is currently the same between GXL and GXBB.
Rename function names and register names to avoid hardcoding the GXBB
prefix.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I7e58ab68489df8d4762663fc01fb64e6899cc8bf

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73f6d05725-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the thermal driver

No need to have a special SoC-specific prefix.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I0da543e7d92d56604e79440a98027ffd9a2eaa59

010fdc1b25-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the private header file

The header file is shared between all the SoCs. Better avoiding
hardcoding the SoC name in the function names.

Signed-off-by: Carlo Caione <ccaione@

amlogic: Fix prefixes in the private header file

The header file is shared between all the SoCs. Better avoiding
hardcoding the SoC name in the function names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I9074871bd1ed8a702c1a656e0f50f2d3c6cb0425

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93c795ae25-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the efuse driver

The efuse driver is hardcoding the GXBB prefix. No need to do that since
the driver is shared between multiple SoCs.

Signed-off-by: Carlo Caione <ccaione@b

amlogic: Fix prefixes in the efuse driver

The efuse driver is hardcoding the GXBB prefix. No need to do that since
the driver is shared between multiple SoCs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I97691b0bbd55170d8216d301a3fc04feb8c2af2e

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821781f324-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the platform macros file

Fixing at the same time the related register names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ib1130d50abe6088f1c0826878d1ae454

amlogic: Fix prefixes in the platform macros file

Fixing at the same time the related register names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ib1130d50abe6088f1c0826878d1ae454a0f23008

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f681c67624-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Fix prefixes in the helpers file

The code is the common directory is now generic, no need to have the SoC
prefix hardcoded in the function names.

Signed-off-by: Carlo Caione <ccaione@bayli

amlogic: Fix prefixes in the helpers file

The code is the common directory is now generic, no need to have the SoC
prefix hardcoded in the function names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ied3a5e506b9abd4c2d6f893bafef50019bff24f1

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fab6951224-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Rework Makefiles

Now that every piece is in place, the makefiles can be refactored and
slightly beautified removing useless and redundant parts.

Signed-off-by: Carlo Caione <ccaione@baylib

amlogic: Rework Makefiles

Now that every piece is in place, the makefiles can be refactored and
slightly beautified removing useless and redundant parts.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: If74e1909df52d475cf4b0dfed819d07d3a4c85b9

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35aee24e24-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Move the SIP SVC code to common directory

The code is the same between GXBB and GXL. Move it to the common source
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I

amlogic: Move the SIP SVC code to common directory

The code is the same between GXBB and GXL. Move it to the common source
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I875689a6fd029971aa755fc2725217e90ed06b6c

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261e7fd724-Aug-2019 Carlo Caione <ccaione@baylibre.com>

amlogic: Move topology file to common directory

As done already for multiple files, move the topology file to the common
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Iac

amlogic: Move topology file to common directory

As done already for multiple files, move the topology file to the common
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Iaca357a089593ad58c35c05c929239132249dcda

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