| af1e8fda | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
uniphier: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data s
uniphier: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: Ia9d996bb45ff3a7f1b240f12fd75805b48a048e9 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 7b8fe2de | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
spe: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data struct
spe: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: I75dbfafb67849833b3f7b5047e237651e3f553cd Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 78b40dce | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
cdns: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data struc
cdns: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: I9f8b55414ab7965e431e3e86d182eabd511f32a4 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 9536a25e | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
LS 16550: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data s
LS 16550: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: Ifd6aff1064ba1c3c029cdd8a83f715f7a9976db5 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| c10db6de | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
stm32: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data stru
stm32: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: Iea6ca26ff4903c33f0fad27fec96fdbabd4e0a91 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| c01ee06b | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
rcar: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data struc
rcar: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: I836e26ff1771abf21fd460d0ee40e90a452e9b43 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 3968bc08 | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
a3700: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data stru
a3700: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: I89c3ab2ed85ab941d8b38ced48474feb4aaa8b7e Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 98964f05 | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
16550: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data stru
16550: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: I5c2fe3b6a667acf80c808cfec4a64059a2c9c25f Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| d7873bcd | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
imx: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data struct
imx: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: I058f793e4024fa7291e432f5be374a77faf16f36 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| ea9b9627 | 25-Feb-2020 |
Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Fix argument type for mailbox driver
This patch comes as fixes for 'intel: Fix Coverity Scan Defects' patch. Revert changing argument type from uint32_t to uint64_t to fix incompatible cast i
intel: Fix argument type for mailbox driver
This patch comes as fixes for 'intel: Fix Coverity Scan Defects' patch. Revert changing argument type from uint32_t to uint64_t to fix incompatible cast issue. Fix said bug by using intermediate uint32_t array as a more appropriate solution.
Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I344cdabd432cf0a0389b225c934b35d12f4c631d
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| d603fd30 | 02-Oct-2019 |
Tien Hock, Loh <tien.hock.loh@intel.com> |
intel: Enable EMAC PHY in Intel FPGA platform
This initializes the EMAC PHY in both Stratix 10 and Agilex, without this, EMAC PHY wouldn't work correctly.
Change-Id: I7e6b9e88fd9ef472884fcf648e6001
intel: Enable EMAC PHY in Intel FPGA platform
This initializes the EMAC PHY in both Stratix 10 and Agilex, without this, EMAC PHY wouldn't work correctly.
Change-Id: I7e6b9e88fd9ef472884fcf648e6001fcb7549ae6 Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
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| 60e8f3cf | 07-Nov-2019 |
Petre-Ionut Tudor <petre-ionut.tudor@arm.com> |
Read-only xlat tables for BL31 memory
This patch introduces a build flag which allows the xlat tables to be mapped in a read-only region within BL31 memory. It makes it much harder for someone who h
Read-only xlat tables for BL31 memory
This patch introduces a build flag which allows the xlat tables to be mapped in a read-only region within BL31 memory. It makes it much harder for someone who has acquired the ability to write to arbitrary secure memory addresses to gain control of the translation tables.
The memory attributes of the descriptors describing the tables themselves are changed to read-only secure data. This change happens at the end of BL31 runtime setup. Until this point, the tables have read-write permissions. This gives a window of opportunity for changes to be made to the tables with the MMU on (e.g. reclaiming init code). No changes can be made to the tables with the MMU turned on from this point onwards. This change is also enabled for sp_min and tspd.
To make all this possible, the base table was moved to .rodata. The penalty we pay is that now .rodata must be aligned to the size of the base table (512B alignment). Still, this is better than putting the base table with the higher level tables in the xlat_table section, as that would cost us a full 4KB page.
Changing the tables from read-write to read-only cannot be done with the MMU on, as the break-before-make sequence would invalidate the descriptor which resolves the level 3 page table where that very descriptor is located. This would make the translation required for writing the changes impossible, generating an MMU fault.
The caches are also flushed.
Signed-off-by: Petre-Ionut Tudor <petre-ionut.tudor@arm.com> Change-Id: Ibe5de307e6dc94c67d6186139ac3973516430466
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| d25625ca | 05-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
plat/arm: Retrieve the right ROTPK when using the dualroot CoT
The dualroot chain of trust involves 2 root-of-trust public keys: - The classic ROTPK. - The platform ROTPK (a.k.a. PROTPK).
Use the c
plat/arm: Retrieve the right ROTPK when using the dualroot CoT
The dualroot chain of trust involves 2 root-of-trust public keys: - The classic ROTPK. - The platform ROTPK (a.k.a. PROTPK).
Use the cookie argument as a key ID for plat_get_rotpk_info() to return the appropriate one. This only applies if we are using the dualroot CoT ; if using the TBBR one, the behaviour is unchanged.
Change-Id: I400707a87ec01afd5922b68db31d652d787f79bd Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 88005701 | 06-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
plat/arm: Pass cookie argument down to arm_get_rotpk_info()
The cookie will be leveraged in the next commit.
Change-Id: Ie8bad275d856d84c27466461cf815529dd860446 Signed-off-by: Sandrine Bailleux <s
plat/arm: Pass cookie argument down to arm_get_rotpk_info()
The cookie will be leveraged in the next commit.
Change-Id: Ie8bad275d856d84c27466461cf815529dd860446 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 1035a706 | 06-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
plat/arm: Add support for dualroot CoT
- Use the development PROTPK if using the dualroot CoT.
Note that unlike the ROTPK, the PROTPK key hash file is not generated from the key file, instead i
plat/arm: Add support for dualroot CoT
- Use the development PROTPK if using the dualroot CoT.
Note that unlike the ROTPK, the PROTPK key hash file is not generated from the key file, instead it has to be provided. This might be enhanced in the future.
- Define a CoT build flag for the platform code to provide different implementations where needed.
Change-Id: Iaaf25183b94e77a99a5d8d875831d90c102a97ea Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 32e26c06 | 05-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
plat/arm: Provide some PROTK files for development
When using the new dualroot chain of trust, a new root of trust key is needed to authenticate the images belonging to the platform owner. Provide a
plat/arm: Provide some PROTK files for development
When using the new dualroot chain of trust, a new root of trust key is needed to authenticate the images belonging to the platform owner. Provide a development one to deploy this on Arm platforms.
Change-Id: I481145e09aa564822d474cb47d38ec211dd24efd Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| e9cf1bcc | 12-Mar-2018 |
Julius Werner <jwerner@chromium.org> |
mt8173: Add support for new watchdog SMC
This patch adds support for a new SMC that can be used to control the watchdog. This allows for a cleaner separation of responsibilities where all watchdog o
mt8173: Add support for new watchdog SMC
This patch adds support for a new SMC that can be used to control the watchdog. This allows for a cleaner separation of responsibilities where all watchdog operations have to go through Trusted Firmware and we could no longer have kernel and firmware poking concurrently at the same register block.
Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Evan Benn <evanbenn@chromium.org> Change-Id: I4844a3559d5c956a53a74a61dd5bc2956f0cce7b
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| 2f39c55c | 21-Feb-2020 |
joanna.farley <joanna.farley@arm.com> |
Merge "Add Matterhorn CPU lib" into integration |
| e5712113 | 21-Feb-2020 |
joanna.farley <joanna.farley@arm.com> |
Merge "Add CPULib for Klein Core" into integration |
| b1f97e41 | 21-Feb-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "rockchip: fix definition of struct param_ddr_usage" into integration |
| 8a47fe43 | 20-Jun-2018 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: spe: uninit console on a timeout
There are chances a denial-of-service attack, if an attacker removes the SPE firmware from the system. The console driver would end up waiting for the firmwar
Tegra: spe: uninit console on a timeout
There are chances a denial-of-service attack, if an attacker removes the SPE firmware from the system. The console driver would end up waiting for the firmware to respond indefinitely. The console driver must detect such scenarios and uninit the interface as a result.
This patch adds a timeout to the interaction with the SPE firmware and uninits the interface if it times out.
Change-Id: I06f27a858baed25711d41105b4110865f1a01727 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 5d52aea8 | 26-Jun-2018 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: handler to check support for System Suspend
Tegra210 SoCs need the sc7entry-fw to enter System Suspend mode, but there might be certain boards that do not have this firmware blob. To stop the
Tegra: handler to check support for System Suspend
Tegra210 SoCs need the sc7entry-fw to enter System Suspend mode, but there might be certain boards that do not have this firmware blob. To stop the NS world from issuing System suspend entry commands on such devices, we ned to disable System Suspend from the PSCI "features".
This patch removes the System suspend handler from the Tegra PSCI ops, so that the framework will disable support for "System Suspend" from the PSCI "features".
Original change by: kalyani chidambaram <kalyanic@nvidia.com>
Change-Id: Ie029f82f55990a8b3a6debb73e95e0e218bfd1f5 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 21368290 | 20-Jun-2018 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: bpmp_ipc: improve cyclomatic complexity
Code complexity is a good indication of maintainability versus testability of a piece of software.
ISO26262 introduces the following thresholds:
Tegra: bpmp_ipc: improve cyclomatic complexity
Code complexity is a good indication of maintainability versus testability of a piece of software.
ISO26262 introduces the following thresholds:
complexity < 10 is accepted 10 <= complexity < 20 has to be justified complexity >= 20 cannot be accepted
Rationale is that number of test cases to fully test a piece of software can (depending on the coverage metrics) grow exponentially with the number of branches in the software.
This patch removes redundant conditionals from 'ipc_send_req_atomic' handler to reduce the McCabe Cyclomatic Complexity for this function
Change-Id: I20fef79a771301e1c824aea72a45ff83f97591d5 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 6f47acdb | 20-Jun-2018 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: platform handler to relocate BL32 image
This patch provides platforms an opportunity to relocate the BL32 image, during cold boot. Tegra186 platforms, for example, relocate BL32 images to TZD
Tegra: platform handler to relocate BL32 image
This patch provides platforms an opportunity to relocate the BL32 image, during cold boot. Tegra186 platforms, for example, relocate BL32 images to TZDRAM memory as the previous bootloader relies on BL31 to do so.
Change-Id: Ibb864901e43aca5bf55d8c79e918b598c12e8a28 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| ee21281a | 20-Jun-2018 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: common: improve cyclomatic complexity
Code complexity is a good indication of maintainability versus testability of a piece of software.
ISO26262 introduces the following thresholds:
co
Tegra: common: improve cyclomatic complexity
Code complexity is a good indication of maintainability versus testability of a piece of software.
ISO26262 introduces the following thresholds:
complexity < 10 is accepted 10 <= complexity < 20 has to be justified complexity >= 20 cannot be accepted
Rationale is that number of test cases to fully test a piece of software can (depending on the coverage metrics) grow exponentially with the number of branches in the software.
This patch removes redundant conditionals from 'bl31_early_platform_setup' handler to reduce the McCabe Cyclomatic Complexity for this function.
Change-Id: Ifb628e33269b388f9323639cd97db761a7e049c4 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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