1/* 2 * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <platform_def.h> 8 9#include <common/bl_common.ld.h> 10#include <lib/xlat_tables/xlat_tables_defs.h> 11 12OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) 13OUTPUT_ARCH(PLATFORM_LINKER_ARCH) 14ENTRY(bl2_entrypoint) 15 16MEMORY { 17 RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE 18} 19 20 21SECTIONS 22{ 23 . = BL2_BASE; 24 ASSERT(. == ALIGN(PAGE_SIZE), 25 "BL2_BASE address is not aligned on a page boundary.") 26 27#if SEPARATE_CODE_AND_RODATA 28 .text . : { 29 __TEXT_START__ = .; 30 *bl2_entrypoint.o(.text*) 31 *(SORT_BY_ALIGNMENT(.text*)) 32 *(.vectors) 33 . = ALIGN(PAGE_SIZE); 34 __TEXT_END__ = .; 35 } >RAM 36 37 /* .ARM.extab and .ARM.exidx are only added because Clang need them */ 38 .ARM.extab . : { 39 *(.ARM.extab* .gnu.linkonce.armextab.*) 40 } >RAM 41 42 .ARM.exidx . : { 43 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 44 } >RAM 45 46 .rodata . : { 47 __RODATA_START__ = .; 48 *(SORT_BY_ALIGNMENT(.rodata*)) 49 50 . = ALIGN(8); 51 __FCONF_POPULATOR_START__ = .; 52 KEEP(*(.fconf_populator)) 53 __FCONF_POPULATOR_END__ = .; 54 55 /* Ensure 8-byte alignment for descriptors and ensure inclusion */ 56 . = ALIGN(8); 57 __PARSER_LIB_DESCS_START__ = .; 58 KEEP(*(.img_parser_lib_descs)) 59 __PARSER_LIB_DESCS_END__ = .; 60 61 . = ALIGN(PAGE_SIZE); 62 __RODATA_END__ = .; 63 } >RAM 64#else 65 ro . : { 66 __RO_START__ = .; 67 *bl2_entrypoint.o(.text*) 68 *(SORT_BY_ALIGNMENT(.text*)) 69 *(SORT_BY_ALIGNMENT(.rodata*)) 70 71 . = ALIGN(8); 72 __FCONF_POPULATOR_START__ = .; 73 KEEP(*(.fconf_populator)) 74 __FCONF_POPULATOR_END__ = .; 75 76 /* Ensure 8-byte alignment for descriptors and ensure inclusion */ 77 . = ALIGN(8); 78 __PARSER_LIB_DESCS_START__ = .; 79 KEEP(*(.img_parser_lib_descs)) 80 __PARSER_LIB_DESCS_END__ = .; 81 82 *(.vectors) 83 __RO_END_UNALIGNED__ = .; 84 /* 85 * Memory page(s) mapped to this section will be marked as 86 * read-only, executable. No RW data from the next section must 87 * creep in. Ensure the rest of the current memory page is unused. 88 */ 89 . = ALIGN(PAGE_SIZE); 90 __RO_END__ = .; 91 } >RAM 92#endif 93 94 /* 95 * Define a linker symbol to mark start of the RW memory area for this 96 * image. 97 */ 98 __RW_START__ = . ; 99 100 /* 101 * .data must be placed at a lower address than the stacks if the stack 102 * protector is enabled. Alternatively, the .data.stack_protector_canary 103 * section can be placed independently of the main .data section. 104 */ 105 .data . : { 106 __DATA_START__ = .; 107 *(SORT_BY_ALIGNMENT(.data*)) 108 __DATA_END__ = .; 109 } >RAM 110 111 stacks (NOLOAD) : { 112 __STACKS_START__ = .; 113 *(tzfw_normal_stacks) 114 __STACKS_END__ = .; 115 } >RAM 116 117 /* 118 * The .bss section gets initialised to 0 at runtime. 119 * Its base address should be 16-byte aligned for better performance of the 120 * zero-initialization code. 121 */ 122 .bss : ALIGN(16) { 123 __BSS_START__ = .; 124 *(SORT_BY_ALIGNMENT(.bss*)) 125 *(COMMON) 126 __BSS_END__ = .; 127 } >RAM 128 129 XLAT_TABLE_SECTION >RAM 130 131#if USE_COHERENT_MEM 132 /* 133 * The base address of the coherent memory section must be page-aligned (4K) 134 * to guarantee that the coherent data are stored on their own pages and 135 * are not mixed with normal data. This is required to set up the correct 136 * memory attributes for the coherent data page tables. 137 */ 138 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { 139 __COHERENT_RAM_START__ = .; 140 *(tzfw_coherent_mem) 141 __COHERENT_RAM_END_UNALIGNED__ = .; 142 /* 143 * Memory page(s) mapped to this section will be marked 144 * as device memory. No other unexpected data must creep in. 145 * Ensure the rest of the current memory page is unused. 146 */ 147 . = ALIGN(PAGE_SIZE); 148 __COHERENT_RAM_END__ = .; 149 } >RAM 150#endif 151 152 /* 153 * Define a linker symbol to mark end of the RW memory area for this 154 * image. 155 */ 156 __RW_END__ = .; 157 __BL2_END__ = .; 158 159 __BSS_SIZE__ = SIZEOF(.bss); 160 161#if USE_COHERENT_MEM 162 __COHERENT_RAM_UNALIGNED_SIZE__ = 163 __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__; 164#endif 165 166 ASSERT(. <= BL2_LIMIT, "BL2 image has exceeded its limit.") 167} 168