plat/stm32: Use generic fdt_read_uint32_array() implementation

The device tree parsing code for the STM32 platform is using its own FDT
helper functions, some of them being rather generic.
In partic

plat/stm32: Use generic fdt_read_uint32_array() implementation

The device tree parsing code for the STM32 platform is using its own FDT
helper functions, some of them being rather generic.
In particular the existing fdt_read_uint32_array() implementation is now
almost identical to the new generic code in fdt_wrappers.c, so we can
remove the ST specific version and adjust the existing callers.

Compared to the original ST implementation the new version takes a
pointer to the DTB as the first argument, and also swaps the order of
the number of cells and the pointer.

Change-Id: Id06b0f1ba4db1ad1f733be40e82c34f46638551a
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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fdt/wrappers: Generalise fdtw_read_array()

Currently our fdtw_read_array() implementation requires the length of
the property to exactly match the requested size, which makes it less
flexible for pa

fdt/wrappers: Generalise fdtw_read_array()

Currently our fdtw_read_array() implementation requires the length of
the property to exactly match the requested size, which makes it less
flexible for parsing generic device trees.
Also the name is slightly misleading, since we treat the cells of the
array as 32 bit unsigned integers, performing the endianess conversion.

To fix those issues and align the code more with other DT users (Linux
kernel or U-Boot), rename the function to "fdt_read_uint32_array", and
relax the length check to only check if the property covers at least the
number of cells we request.
This also changes the variable names to be more in-line with other DT
users, and switches to the proper data types.

This makes this function more useful in later patches.

Change-Id: Id86f4f588ffcb5106d4476763ecdfe35a735fa6c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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rcar_gen3: plat: Zero-terminate the string in unsigned_num_print()

Make sure the string generated in unsigned_num_print() is zero-terminated.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.c

rcar_gen3: plat: Zero-terminate the string in unsigned_num_print()

Make sure the string generated in unsigned_num_print() is zero-terminated.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ic0ac1ebca255002522159a9152ab41991f043d05

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Merge changes from topic "linker-script" into integration

* changes:
linker_script: move .data section to bl_common.ld.h
linker_script: move stacks section to bl_common.ld.h
bl1: remove '.' fr

Merge changes from topic "linker-script" into integration

* changes:
linker_script: move .data section to bl_common.ld.h
linker_script: move stacks section to bl_common.ld.h
bl1: remove '.' from stacks section in linker script

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linker_script: move .data section to bl_common.ld.h

Move the data section to the common header.

I slightly tweaked some scripts as follows:

[1] bl1.ld.S has ALIGN(16). I added DATA_ALIGN macro, wh

linker_script: move .data section to bl_common.ld.h

Move the data section to the common header.

I slightly tweaked some scripts as follows:

[1] bl1.ld.S has ALIGN(16). I added DATA_ALIGN macro, which is 1
by default, but overridden by bl1.ld.S. Currently, ALIGN(16)
of the .data section is redundant because commit 412865907699
("Fix boot failures on some builds linked with ld.lld.") padded
out the previous section to work around the issue of LLD version
<= 10.0. This will be fixed in the future release of LLVM, so
I am keeping the proper way to align LMA.

[2] bl1.ld.S and bl2_el3.ld.S define __DATA_RAM_{START,END}__ instead
of __DATA_{START,END}__. I put them out of the .data section.

[3] SORT_BY_ALIGNMENT() is missing tsp.ld.S, sp_min.ld.S, and
mediatek/mt6795/bl31.ld.S. This commit adds SORT_BY_ALIGNMENT()
for all images, so the symbol order in those three will change,
but I do not think it is a big deal.

Change-Id: I215bb23c319f045cd88e6f4e8ee2518c67f03692
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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linker_script: move stacks section to bl_common.ld.h

The stacks section is the same for all BL linker scripts.

Move it to the common header file.

Change-Id: Ibd253488667ab4f69702d56ff9e9929376704f

linker_script: move stacks section to bl_common.ld.h

The stacks section is the same for all BL linker scripts.

Move it to the common header file.

Change-Id: Ibd253488667ab4f69702d56ff9e9929376704f6c
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge "Provide a hint to power controller for DSU cluster power down" into integration

Merge "board/rddanielxlr: add support for rd-daniel config-xlr platform" into integration

spm: Normalize the style of spm core manifest

Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Change-Id: Ib39e53eb53521b8651fb30b7bf0058f7669569d5

board/rddanielxlr: add support for rd-daniel config-xlr platform

RD-Daniel Config-XLR platform has four identical chips connected via a
high speed coherent CCIX link. Each chip has four Neoverse cor

board/rddanielxlr: add support for rd-daniel config-xlr platform

RD-Daniel Config-XLR platform has four identical chips connected via a
high speed coherent CCIX link. Each chip has four Neoverse cores
connected via coherent CMN interconnect.

Change-Id: I37d1b91f2b6ba08f61c64d0288bc16a429836c08
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>

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juno/sgm: Align SCP_BL2 to page boundary

This commit fixes an assertion that was triggering in certain contexts:

ERROR: mmap_add_region_check() failed. error -22
ASSERT: lib/xlat_tables_v2/

juno/sgm: Align SCP_BL2 to page boundary

This commit fixes an assertion that was triggering in certain contexts:

ERROR: mmap_add_region_check() failed. error -22
ASSERT: lib/xlat_tables_v2/xlat_tables_core.c:790

Change-Id: Ia55b3fb4f496c8cd791ea6093d122edae0a7e92a
Signed-off-by: Chris Kay <chris.kay@arm.com>
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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Provide a hint to power controller for DSU cluster power down

By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all

Provide a hint to power controller for DSU cluster power down

By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all cores are powered down.

The AArch32 CLUSTERPWRDN register is architecturally mapped to the
AArch64 CLUSTERPWRDN_EL1 register

Change-Id: Ie6e67c1c7d811fa25c51e2e405ca7f59bd20c81b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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Merge "plat/arm/sgi: update mmap and xlat count" into integration

plat/arm/sgi: update mmap and xlat count

A single chip platform requires five mmap entries and a corresponding
number of translation tables. For every additional chip in the system,
three additional

plat/arm/sgi: update mmap and xlat count

A single chip platform requires five mmap entries and a corresponding
number of translation tables. For every additional chip in the system,
three additional mmap entries are required to map the shared SRAM and
the IO regions. A corresponding number of additional translation
tables are required as well.

Change-Id: I1332a1305f2af62181387cf36954f6fb0e6f11ed
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>

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stingray: fix coverity reported issues on brcm platform

fix coverity reported issues
1. uninitialized var,
2. check for negative val on unsigned variable

Signed-off-by: Sheetal Tigadoli <sheetal.ti

stingray: fix coverity reported issues on brcm platform

fix coverity reported issues
1. uninitialized var,
2. check for negative val on unsigned variable

Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Change-Id: I28b7517135ba6c1ba0df04f0c73189cf84ba89e6

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arm_fpga: Remove bogus timer initialisation

The arm_fpga platform code contains an dubious line to initialise some
timer. On closer inspection this turn out to be bogus, as this was only
needed on s

arm_fpga: Remove bogus timer initialisation

The arm_fpga platform code contains an dubious line to initialise some
timer. On closer inspection this turn out to be bogus, as this was only
needed on some special (older) FPGA board, and is actually not needed on
the current model. Also the base address was wrong anyways.

Remove the code entirely.

Change-Id: I02e71aea645051b5addb42d972d7a79f04b81106
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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Merge "plat/arm/rddaniel: enabled GICv4 extension" into integration

plat/arm/rddaniel: enabled GICv4 extension

RD-Daniel uses GIC-Clayton as its interrupt controller which is an
implementation of GICv4.1 architecture. Hence for RD-Daniel, enable
GICv4 extension supp

plat/arm/rddaniel: enabled GICv4 extension

RD-Daniel uses GIC-Clayton as its interrupt controller which is an
implementation of GICv4.1 architecture. Hence for RD-Daniel, enable
GICv4 extension support.

Change-Id: I45ae8c82376f8fe8fc0666306822ae2db74e71b8
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>

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Merge changes from topics "af/fvp_gicv4", "af/gicv4", "af/gic_extended" into integration

* changes:
FVP: Add support for GICv4 extension
TF-A: Add GICv4 extension for GIC driver
TF-A GICv3 dri

Merge changes from topics "af/fvp_gicv4", "af/gicv4", "af/gic_extended" into integration

* changes:
FVP: Add support for GICv4 extension
TF-A: Add GICv4 extension for GIC driver
TF-A GICv3 driver: Add extended PPI and SPI range

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FVP: Add support for GICv4 extension

This patch adds support for GICv4 extension for FVP platform.

Change-Id: Ia389b61266af669b1ca9b999a8b76476cab214f4
Signed-off-by: Alexei Fedorov <Alexei.Fedorov

FVP: Add support for GICv4 extension

This patch adds support for GICv4 extension for FVP platform.

Change-Id: Ia389b61266af669b1ca9b999a8b76476cab214f4
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

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Increase maximum size of BL2 image

Increased the maximum size of BL2 image in order to
accommodate the BL2 image when TF-A build with no compiler
optimization for ARM platform.

Note: As of now, "no

Increase maximum size of BL2 image

Increased the maximum size of BL2 image in order to
accommodate the BL2 image when TF-A build with no compiler
optimization for ARM platform.

Note: As of now, "no compiler optimization" build works
only when TRUSTED_BOOT_BOARD option is set to 0.

This change is verified using below CI configuration:
1. juno-no-optimize-default:juno-linux.uboot
2. fvp-no-optimize-default,fvp-default:fvp-tftf-fip.tftf-aemv8a-debug

Change-Id: I5932621237f8acd1b510682388f3ba78eae90ea4
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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stingray: Fix board configuration typo.

Default board configuration was set to bcm958742k which is not present
in current codebase. This causes a default platform build to fail.
Changing to bcm95874

stingray: Fix board configuration typo.

Default board configuration was set to bcm958742k which is not present
in current codebase. This causes a default platform build to fail.
Changing to bcm958742t.

Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
Change-Id: Ie24f94ef0ef316ff56fe142df5de45d70ba93c28

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Merge "arm_fpga: adapt to new way of including gicv3 files" into integration

arm_fpga: adapt to new way of including gicv3 files

with commit a6ea06f5, the way platform includes gicv3 files has been
modified, this patch adapts to new method of including gicv3 files
for arm_fp

arm_fpga: adapt to new way of including gicv3 files

with commit a6ea06f5, the way platform includes gicv3 files has been
modified, this patch adapts to new method of including gicv3 files
for arm_fpga platform.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ic5ccae842b39b7db06d4f23c5738b174c42edf63

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Merge changes from topic "brcm_initial_support" into integration

* changes:
doc: brcm: Add documentation file for brcm stingray platform
drivers: Add SPI Nor flash support
drivers: Add iproc s

Merge changes from topic "brcm_initial_support" into integration

* changes:
doc: brcm: Add documentation file for brcm stingray platform
drivers: Add SPI Nor flash support
drivers: Add iproc spi driver
drivers: Add emmc driver for Broadcom platforms
Add BL31 support for Broadcom stingray platform
Add BL2 support for Broadcom stingray platform
Add bl31 support common across Broadcom platforms
Add bl2 setup code common across Broadcom platforms
drivers: Add support to retrieve plat_toc_flags

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