History log of /rk3399_ARM-atf/plat/ (Results 5251 – 5275 of 8868)
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69be915427-May-2020 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "plat: imx8mn: Add imx8mn basic support" into integration

1c301e7726-May-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "Cleanup the code for TBBR CoT descriptors" into integration

42d9b3aa17-May-2020 Jan Kiszka <jan.kiszka@siemens.com>

ti: k3: common: Implement stub system_off

PSCI demands that SYSTEM_OFF must not return. While it seems like a
generic ATF bug that this is possible when a platform does not Implement
a corresponding

ti: k3: common: Implement stub system_off

PSCI demands that SYSTEM_OFF must not return. While it seems like a
generic ATF bug that this is possible when a platform does not Implement
a corresponding handler, let's do that here until it's addressed
differently.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Change-Id: I4c08948b18bbfdc3a24214f2ae0fbad9e017ada1

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662af36d07-May-2020 J-Alves <joao.alves@arm.com>

SPCI is now called PSA FF-A

SPCI is renamed as PSA FF-A which stands for Platform Security
Architecture Firmware Framework for A class processors.
This patch replaces the occurrence of SPCI with PSA

SPCI is now called PSA FF-A

SPCI is renamed as PSA FF-A which stands for Platform Security
Architecture Firmware Framework for A class processors.
This patch replaces the occurrence of SPCI with PSA FF-A(in documents)
or simply FFA(in code).

Change-Id: I4ab10adb9ffeef1ff784641dfafd99f515133760
Signed-off-by: J-Alves <joao.alves@arm.com>

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beff491022-May-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "plat/arm/fvp: populate runtime console parameters dynamically" into integration

58fdd60828-Nov-2019 Jacky Bai <ping.bai@nxp.com>

plat: imx8mn: Add imx8mn basic support

Add imx8mn basic support

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ibdfcc87700bfaf980e429f3a5fa08515218ae78d

de9d0d7c21-May-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "Tegra: enable SDEI handling" into integration

6ac1bb3021-May-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "Tegra194: validate C6 power state type" into integration

1a7aa3b321-May-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "Tegra194: remove support for CPU suspend power down state" into integration

e0b3e6b321-May-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "plat/fvp: Support for extracting UART serial node info from DT" into integration

12d1343016-Apr-2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

plat/arm/fvp: populate runtime console parameters dynamically

We query the UART base address and clk frequency in runtime
using fconf getter APIs.

Change-Id: I5f4e84953be5f384472bf90720b706d45cb862

plat/arm/fvp: populate runtime console parameters dynamically

We query the UART base address and clk frequency in runtime
using fconf getter APIs.

Change-Id: I5f4e84953be5f384472bf90720b706d45cb86260
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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447870bf24-Mar-2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

plat/fvp: Support for extracting UART serial node info from DT

This patch introduces the populate function which leverages
a new driver to extract base address and clk frequency properties
of the ua

plat/fvp: Support for extracting UART serial node info from DT

This patch introduces the populate function which leverages
a new driver to extract base address and clk frequency properties
of the uart serial node from HW_CONFIG device tree.

This patch also introduces fdt helper API fdtw_translate_address()
which helps in performing address translation.

Change-Id: I053628065ebddbde0c9cb3aa93d838619f502ee3
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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fc721f8320-May-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "Enable v8.6 WFE trap delays" into integration

d886628d18-Apr-2020 Varun Wadekar <vwadekar@nvidia.com>

Tegra: enable SDEI handling

This patch enables SDEI support for all Tegra platforms, with
the following configuration settings.

* SGI 8 as the source IRQ
* Special Private Event 0
* Three private,

Tegra: enable SDEI handling

This patch enables SDEI support for all Tegra platforms, with
the following configuration settings.

* SGI 8 as the source IRQ
* Special Private Event 0
* Three private, dynamic events
* Three shared, dynamic events
* Twelve general purpose explicit events

Verified using TFTF SDEI test suite.

******************************* Summary *******************************
Test suite 'SDEI' Passed
=================================
Tests Skipped : 0
Tests Passed : 5
Tests Failed : 0
Tests Crashed : 0
Total tests : 5
=================================

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I1922069931a7876a4594e53260ee09f2e4f09390

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a773abb620-May-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "plat/fvp: Populate GICv3 parameters dynamically" into integration

6cac724d22-Apr-2020 johpow01 <john.powell@arm.com>

Enable v8.6 WFE trap delays

This patch enables the v8.6 extension to add a delay before WFE traps
are taken. A weak hook plat_arm_set_twedel_scr_el3 has been added in
plat/common/aarch64/plat_common

Enable v8.6 WFE trap delays

This patch enables the v8.6 extension to add a delay before WFE traps
are taken. A weak hook plat_arm_set_twedel_scr_el3 has been added in
plat/common/aarch64/plat_common.c that disables this feature by default
but platform-specific code can override it when needed.

The only hook provided sets the TWED fields in SCR_EL3, there are similar
fields in HCR_EL2, SCTLR_EL2, and SCTLR_EL1 to control WFE trap delays in
lower ELs but these should be configured by code running at EL2 and/or EL1
depending on the platform configuration and is outside the scope of TF-A.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I0a9bb814205efeab693a3d0a0623e62144abba2d

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8370c8ce12-May-2020 laurenw-arm <lauren.wehrmeister@arm.com>

plat/fvp: Populate GICv3 parameters dynamically

Query the GICD and GICR base addresses in runtime using fconf getter
APIs.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id:

plat/fvp: Populate GICv3 parameters dynamically

Query the GICD and GICR base addresses in runtime using fconf getter
APIs.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I309fb2874f3329ddeb8677ddb53ed4c02199a1e9

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ad43c49e16-May-2020 Manish V Badarkhe <Manish.Badarkhe@arm.com>

Cleanup the code for TBBR CoT descriptors

CoT used for BL1 and BL2 are moved to tbbr_cot_bl1.c
and tbbr_cot_bl2.c respectively.
Common CoT used across BL1 and BL2 are moved to
tbbr_cot_common.c.

Si

Cleanup the code for TBBR CoT descriptors

CoT used for BL1 and BL2 are moved to tbbr_cot_bl1.c
and tbbr_cot_bl2.c respectively.
Common CoT used across BL1 and BL2 are moved to
tbbr_cot_common.c.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I2252ac8a6960b3431bcaafdb3ea4fb2d01b79cf5

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359acf7717-May-2020 Varun Wadekar <vwadekar@nvidia.com>

Tegra: enable stack protection

This patch sets ENABLE_STACK_PROTECTOR=strong and implements
the platform support to generate a stack protection canary value.

Signed-off-by: Varun Wadekar <vwadekar@

Tegra: enable stack protection

This patch sets ENABLE_STACK_PROTECTOR=strong and implements
the platform support to generate a stack protection canary value.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: Ia8afe464b5645917b1c77d49305d19c7cd01866a

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cbf9e84a18-Dec-2019 Balint Dobszay <balint.dobszay@arm.com>

plat/arm/fvp: Support performing SDEI platform setup in runtime

This patch introduces dynamic configuration for SDEI setup and is supported
when the new build flag SDEI_IN_FCONF is enabled. Instead

plat/arm/fvp: Support performing SDEI platform setup in runtime

This patch introduces dynamic configuration for SDEI setup and is supported
when the new build flag SDEI_IN_FCONF is enabled. Instead of using C arrays
and processing the configuration at compile time, the config is moved to
dts files. It will be retrieved at runtime during SDEI init, using the fconf
layer.

Change-Id: If5c35a7517ba00a9f258d7f3e7c8c20cee169a31
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
Co-authored-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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f95dfc2715-May-2020 Manish Pandey <manish.pandey2@arm.com>

Merge "Tegra: introduce support for SMCCC_ARCH_SOC_ID" into integration

23d5ba8607-Feb-2020 Olivier Deprez <olivier.deprez@arm.com>

SPMD: extract SPMC DTB header size from SPMD

Currently BL2 passes TOS_FW_CONFIG address and size through registers to
BL31. This corresponds to SPMC manifest load address and size. The SPMC
manifest

SPMD: extract SPMC DTB header size from SPMD

Currently BL2 passes TOS_FW_CONFIG address and size through registers to
BL31. This corresponds to SPMC manifest load address and size. The SPMC
manifest is mapped in BL31 by dynamic mapping. This patch removes BL2
changes from generic code (which were enclosed by SPD=spmd) and retrieves
SPMC manifest size directly from within SPMD. The SPMC manifest load
address is still passed through a register by generic code.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I35c5abd95c616ae25677302f0b1d0c45c51c042f

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5269694616-Apr-2020 Olivier Deprez <olivier.deprez@arm.com>

SPMD: code/comments cleanup

As a follow-up to bdd2596d4, and related to SPM Dispatcher
EL3 component and SPM Core S-EL2/S-EL1 component: update
with cosmetic and coding rules changes. In addition:
-

SPMD: code/comments cleanup

As a follow-up to bdd2596d4, and related to SPM Dispatcher
EL3 component and SPM Core S-EL2/S-EL1 component: update
with cosmetic and coding rules changes. In addition:
-Add Armv8.4-SecEL2 arch detection helper.
-Add an SPMC context (on current core) get helper.
-Return more meaningful error return codes.
-Remove complexity in few spmd_smc_handler switch-cases.
-Remove unused defines and structures from spmd_private.h

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I99e642450b0dafb19d3218a2f0e2d3107e8ca3fe

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b5b2923d12-May-2020 Varun Wadekar <vwadekar@nvidia.com>

Tegra: introduce support for SMCCC_ARCH_SOC_ID

This patch returns the SOC version and revision values from
the 'plat_get_soc_version' and 'plat_get_soc_revision' handlers.

Verified using TFTF SMCCC

Tegra: introduce support for SMCCC_ARCH_SOC_ID

This patch returns the SOC version and revision values from
the 'plat_get_soc_version' and 'plat_get_soc_revision' handlers.

Verified using TFTF SMCCC_ARCH_SOC_ID test.

<snip>
> Executing 'SMCCC_ARCH_SOC_ID test'
TEST COMPLETE Passed
SOC Rev = 0x102
SOC Ver = 0x36b0019
<snip>

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: Ibd7101619143b74f6f6660732daeac1a8bca3e44

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ccc199ed25-Apr-2020 Etienne Carriere <etienne.carriere@st.com>

plat/stm32mp1: fdt helpers for secure aware gpio bank

New helper functions to get GPIO banks configuration from the FDT.

stm32_get_gpio_bank_pinctrl_node() allows stm32mp platforms to
differentiate

plat/stm32mp1: fdt helpers for secure aware gpio bank

New helper functions to get GPIO banks configuration from the FDT.

stm32_get_gpio_bank_pinctrl_node() allows stm32mp platforms to
differentiate specific GPIO banks when these are defined with a specific
path in the FDT.

fdt_get_gpio_bank_pin_count() returns the number of pins in a GPIO bank
as it depends on the SoC variant.

Change-Id: I4481774152b3c6bf35bf986f58e357c2f9c19176
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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