| 96a0f978 | 16-Jun-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "rpi4: update the iobase constant" into integration |
| f85ab341 | 16-Jun-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I4451ca03,I29be60ec,Ia30bd332,I72fe2275,I37bd65b0 into integration
* changes: feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition feat(plat/nxp/common): add build macro for BOOT
Merge changes I4451ca03,I29be60ec,Ia30bd332,I72fe2275,I37bd65b0 into integration
* changes: feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition feat(plat/nxp/common): add build macro for BOOT_MODE validation checking refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk refactor(plat/nxp/lx216x): clean up platform configure file refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk
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| 2a008779 | 16-Jun-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "soc_id" into integration
* changes: refactor(plat/nvidia): use SOC_ID defines refactor(plat/mediatek): use SOC_ID defines refactor(plat/arm): use SOC_ID defines fea
Merge changes from topic "soc_id" into integration
* changes: refactor(plat/nvidia): use SOC_ID defines refactor(plat/mediatek): use SOC_ID defines refactor(plat/arm): use SOC_ID defines feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID refactor(plat/st): export functions to get SoC information feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID
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| 28b3221a | 27-Apr-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition
Add macro of SUPPORTED_BOOT_MODE for board lx2160ardb, lx2160aqds, lx2162aqds.
Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Jiafe
feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition
Add macro of SUPPORTED_BOOT_MODE for board lx2160ardb, lx2160aqds, lx2162aqds.
Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I4451ca030eca79c9bc5fee928eec497a7f0e878c
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| cd1280ea | 27-Apr-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(plat/nxp/common): add build macro for BOOT_MODE validation checking
1. Added the build macro "add_boot_mode_define". 2. Use the macro to validate current BOOT_MODE against the pre-determined
feat(plat/nxp/common): add build macro for BOOT_MODE validation checking
1. Added the build macro "add_boot_mode_define". 2. Use the macro to validate current BOOT_MODE against the pre-determined list of SUPPORTED_BOOT_MODE, so each platform need to define the list: SUPPORTED_BOOT_MODE. 3. Reports error if BOOT_MODE is not in SUPPORTED_BOOT_MODE list, or BOOT_MODE is not supported yet althoug it is in SUPPORTED_BOOT_MODE.
Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I29be60ecdb19fbec1cd162e327cdfb30ba629b07
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| 9398841e | 05-Jan-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk
Move some soc make variables to new soc_common_def.mk, then it can be reused by other platforms.
Signed-off-by: Jiafei P
refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk
Move some soc make variables to new soc_common_def.mk, then it can be reused by other platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: Ia30bd332c95b6475f1cfee2f03a8ed3892a9568d
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| 9663160d | 04-Jan-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
refactor(plat/nxp/lx216x): clean up platform configure file
Use common code in common file to configure platform.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I72fe22751f12b8a4996a7b9f
refactor(plat/nxp/lx216x): clean up platform configure file
Use common code in common file to configure platform.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I72fe22751f12b8a4996a7b9f75fae4c912ea86de
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| 5d5c3ff3 | 04-Jan-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk
Move some common make variables to new plat_common_def.mk, then it can be reused by other platforms.
Signed-off-by: Ji
refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk
Move some common make variables to new plat_common_def.mk, then it can be reused by other platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I37bd65b0f8124f63074fa03339f886c2cdb30bd3
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| 0a8143dd | 27-May-2021 |
Michal Simek <michal.simek@xilinx.com> |
feat(plat/zynqmp): extend DT description by TF-A
In case of TF-A running out of DDR there is a need to reserved memory to let other SW know that none can't use this memory. HW wise this region can b
feat(plat/zynqmp): extend DT description by TF-A
In case of TF-A running out of DDR there is a need to reserved memory to let other SW know that none can't use this memory. HW wise this region can be (and should be) also protected by protection unit XMPU. This is the first step to add reserved memory location to DT.
DT address corresponds with default address in U-Boot and also default address in Xilinx BSPs.
Code is valid only when TF-A runs out of DDR. When it runs out of OCM there is no need to reseve anything because OCM is hidden to OS.
Change-Id: I01f230ced67207a159128cc11d11d36dd4590cab Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| 6b63125c | 25-Mar-2021 |
Peng Fan <peng.fan@nxp.com> |
feat(plat/imx8m): add sdei support for i.MX8MP
Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor could use SDEI to do hypervisor management, after physical IRQ has been disabled rout
feat(plat/imx8m): add sdei support for i.MX8MP
Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor could use SDEI to do hypervisor management, after physical IRQ has been disabled routing.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Change-Id: I8308c629448bd8adca9d3d25701adcf0c5a6afc2
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| ce2be321 | 25-Mar-2021 |
Peng Fan <peng.fan@nxp.com> |
feat(plat/imx8m): add sdei support for i.MX8MN
Add sdei support for i.MX8MN, this is to let jailhouse Hypervisor could use SDEI to do hypervisor management, after physical IRQ has been disabled rout
feat(plat/imx8m): add sdei support for i.MX8MN
Add sdei support for i.MX8MN, this is to let jailhouse Hypervisor could use SDEI to do hypervisor management, after physical IRQ has been disabled routing.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Change-Id: Ie15fffdd09e1bba1b22334b8ccac2335c96b8b4d
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| b085b990 | 09-Jun-2021 |
Mark Dykes <mark.dykes@arm.com> |
Merge "feat(plat/mediatek/mpu): add MPU support for DSP" into integration |
| b39a1308 | 07-Jun-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I85a87dc9,If75df769,I55b0c910 into integration
* changes: feat(plat/st): add STM32MP_EMMC_BOOT option feat(drivers/st): manage boot part in io_mmc feat(drivers/mmc): boot partiti
Merge changes I85a87dc9,If75df769,I55b0c910 into integration
* changes: feat(plat/st): add STM32MP_EMMC_BOOT option feat(drivers/st): manage boot part in io_mmc feat(drivers/mmc): boot partition read support
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| 076bb38d | 07-Jun-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(plat/marvell/a3720/uart): fix UART parent clock rate determination" into integration |
| c20b0606 | 24-Aug-2020 |
Yann Gautier <yann.gautier@st.com> |
refactor(plat/st): avoid fixed DT address
Device Tree address is now a parameter for dt_open_and_check() function. This will allow better flexibility when introducing PIE and FIP. The fdt pointer is
refactor(plat/st): avoid fixed DT address
Device Tree address is now a parameter for dt_open_and_check() function. This will allow better flexibility when introducing PIE and FIP. The fdt pointer is now only assigned if the given address holds a valid device tree file. This allows removing the fdt_checked variable, as we now check fdt is not null.
Change-Id: I04cbb2fc05c9c711ae1c77d56368dbeb6dd4b01a Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| d3b0e870 | 09-Nov-2020 |
Yann Gautier <yann.gautier@st.com> |
refactor(plat/st): check boot device only for BL2
The boot device is now checked inside a dedicated rule, that is only called during BL2 compilation step
Change-Id: Ie7bcd1f166285224b0c042238989a82
refactor(plat/st): check boot device only for BL2
The boot device is now checked inside a dedicated rule, that is only called during BL2 compilation step
Change-Id: Ie7bcd1f166285224b0c042238989a82f7b6105c6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 1a2c0ff9 | 04-Jun-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "od/cleanup-changes" into integration
* changes: perf(spmd): omit sel1 context save if sel2 present fix(fvp): spmc optee manifest remove SMC allowlist fix: random typo
Merge changes from topic "od/cleanup-changes" into integration
* changes: perf(spmd): omit sel1 context save if sel2 present fix(fvp): spmc optee manifest remove SMC allowlist fix: random typos in tf-a code base
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| 214c8a8d | 04-Jun-2021 |
Vyacheslav Yurkov <uvv.mail@gmail.com> |
feat(plat/st): add STM32MP_EMMC_BOOT option
Added a new STM32MP_EMMC_BOOT option, which is used to look for SSBL in the same eMMC boot partition TF-A booted from at a fixed 256k offset. In case STM3
feat(plat/st): add STM32MP_EMMC_BOOT option
Added a new STM32MP_EMMC_BOOT option, which is used to look for SSBL in the same eMMC boot partition TF-A booted from at a fixed 256k offset. In case STM32 image header is not found, the boot process rolls back to a GPT partition look-up scheme.
Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com> Change-Id: I85a87dc9ae7f2b915ed8e584be80f4b3588efc48
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| 0ef419b1 | 03-Jun-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(plat/zynqmp): add SDEI support" into integration |
| 4143268a | 14-Jul-2020 |
Jan Kiszka <jan.kiszka@siemens.com> |
feat(plat/zynqmp): add SDEI support
Add basic SDEI support, implementing the software event 0 only for now. This already allows hypervisors like Jailhouse to use SDEI for internal signaling while pa
feat(plat/zynqmp): add SDEI support
Add basic SDEI support, implementing the software event 0 only for now. This already allows hypervisors like Jailhouse to use SDEI for internal signaling while passing the GICC through to the guest (see also IMX8).
With SDEI on, we overrun the SRAM and need to stay in DRAM. So keep SDEI off by default.
Co-developed-by: Angelo Ruocco <angeloruocco90@gmail.com> Signed-off-by: Angelo Ruocco <angeloruocco90@gmail.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Change-Id: Ic0d71b4ef0978c0a34393f4e3530ed1e24a39ca2
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| 3f916a41 | 03-Jun-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(plat/st): remove io_dummy code for OP-TEE
The io_dummy code and function calls are only used in case BL32 is TF-A SP_min, and not OP-TEE. This code in bl2_io_storage can then be put under #
refactor(plat/st): remove io_dummy code for OP-TEE
The io_dummy code and function calls are only used in case BL32 is TF-A SP_min, and not OP-TEE. This code in bl2_io_storage can then be put under #ifndef AARCH32_SP_OPTEE.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I52787a775160b335f97547203f653419621f5147
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| e1db570a | 11-May-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(plat/st): remove BL2 image loading
STM32MP1 does not use BL1, the loading of BL2 is done by ROM code. It is then useless to have an entry BL2_IMAGE_ID in the policies.
Signed-off-by: Yann
refactor(plat/st): remove BL2 image loading
STM32MP1 does not use BL1, the loading of BL2 is done by ROM code. It is then useless to have an entry BL2_IMAGE_ID in the policies.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I464cedf588114d60522433123f8dbef32ae36818
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| 06c3b100 | 19-May-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(plat/st): rename OP-TEE pager to core
OPTEE_PAGER defines are renamed OPTEE_CORE.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I4c28d3b0a6ed843088a3ef06e3e348ce689fabde |
| 183725b3 | 25-May-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
fix(fvp): spmc optee manifest remove SMC allowlist
Fix a remainder from early prototyping. OP-TEE as a secure partition does not need specific SMC function id pass through to EL3.
Signed-off-by: Ol
fix(fvp): spmc optee manifest remove SMC allowlist
Fix a remainder from early prototyping. OP-TEE as a secure partition does not need specific SMC function id pass through to EL3.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I2843d1b9a5eb4c966f82790e1655fb569c2de7d4
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| 748bdd19 | 03-May-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(plat/arm): correct UUID strings in FVP DT
The UUID strings used in FW_CONFIG DT are not aligned with UUIDs defined in include/tools_share/firmware_image_package.h for BL32_EXTRA1 and TRUSTED_KEY
fix(plat/arm): correct UUID strings in FVP DT
The UUID strings used in FW_CONFIG DT are not aligned with UUIDs defined in include/tools_share/firmware_image_package.h for BL32_EXTRA1 and TRUSTED_KEY_CERT.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I517f8f9311585931f2cb931e0588414da449b694
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