| be1d3a1a | 19-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "gpt-crc" into integration
* changes: feat(partition): verify crc while loading gpt header build(hikey): platform changes for verifying gpt header crc build(agilex): p
Merge changes from topic "gpt-crc" into integration
* changes: feat(partition): verify crc while loading gpt header build(hikey): platform changes for verifying gpt header crc build(agilex): platform changes for verifying gpt header crc build(stratix10): platform changes for verifying gpt header crc build(stm32mp1): platform changes for verifying gpt header crc
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| a8be4cd0 | 21-Feb-2022 |
Marc Bonnici <marc.bonnici@arm.com> |
feat(fvp): add plat hook for memory transactions
Add call to platform hooks upon successful transmission of a memory transaction request and as part of a memory reclaim request. This allows for plat
feat(fvp): add plat hook for memory transactions
Add call to platform hooks upon successful transmission of a memory transaction request and as part of a memory reclaim request. This allows for platform specific functionality to be performed accordingly.
Note the hooks must be placed in the initial share request and final reclaim to prevent order dependencies with operations that may take place in the normal world without visibility of the SPMC.
Add a dummy implementation to the FVP platform.
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Change-Id: I0c7441a9fdf953c4db0651512e5e2cdbc6656c79
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| 6a0788bc | 16-Dec-2021 |
Marc Bonnici <marc.bonnici@arm.com> |
feat(plat/fvp): introduce accessor function to obtain datastore
In order to provide the EL3 SPMC a sufficient datastore to record memory descriptors, a accessor function is used. This allows for the
feat(plat/fvp): introduce accessor function to obtain datastore
In order to provide the EL3 SPMC a sufficient datastore to record memory descriptors, a accessor function is used. This allows for the backing memory to be allocated in a platform defined manner, to accommodate memory constraints and desired use cases.
Provide an implementation for the Arm FVP platform to use a default value of 512KB memory allocated in the TZC RAM section.
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Change-Id: I92bc55ba6e04bdad429eb52f0d2960ceda682804
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| 1ac6af11 | 11-May-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
fix(plat/zynqmp): fix coverity scan warnings
- Fix uninitialized variable use - Fix array overrun issue
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com> Signed-off-by: Ronak Jain <ronak.jain@xil
fix(plat/zynqmp): fix coverity scan warnings
- Fix uninitialized variable use - Fix array overrun issue
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com> Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Change-Id: I604416531122c9208793d66c26b1fa69c95f3165
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| fd36b00f | 18-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "xlnx_zynqmp_misra_fix" into integration
* changes: fix(zynqmp): resolve misra 8.3 warnings fix(zynqmp): resolve misra R8.4 warnings |
| e682c723 | 11-May-2022 |
Rohit Ner <rohitner@google.com> |
build(hikey): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com>
build(hikey): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com> Change-Id: I0d524760bf52e1d9b4a103f556231f20146bd78e
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| 7a756a57 | 11-May-2022 |
Rohit Ner <rohitner@google.com> |
build(agilex): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com
build(agilex): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com> Change-Id: I1290972c7d2626262d4b6d68b99bb8f2c4b6744c
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| 4f53bd29 | 11-May-2022 |
Rohit Ner <rohitner@google.com> |
build(stratix10): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.
build(stratix10): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com> Change-Id: Ie26d9e5943453ce54ee8c72c6e44170577e3afc0
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| 7da7f1f0 | 18-May-2022 |
Rohit Ner <rohitner@google.com> |
build(stm32mp1): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.c
build(stm32mp1): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com> Change-Id: I66f6daaa0deac984b0aa5f2a182385410189ba8a
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| 570c71b2 | 17-May-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
fix(stm32mp1): include assert.h to fix build failure
stm32mp1 platform build failed with the error [1] in the coverity, to fix it included assert.h file.
Including bl32/sp_min/sp_min.mk plat/st/stm
fix(stm32mp1): include assert.h to fix build failure
stm32mp1 platform build failed with the error [1] in the coverity, to fix it included assert.h file.
Including bl32/sp_min/sp_min.mk plat/st/stm32mp1/plat_image_load.c: In function 'plat_get_bl_image_load_info': plat/st/stm32mp1/plat_image_load.c:30:2: error: implicit declaration of function 'assert' [-Werror=implicit-function-declaration] 30 | assert(bl33 != NULL); | ^~~~~~ plat/st/stm32mp1/plat_image_load.c:9:1: note: 'assert' is defined in header '<assert.h>'; did you forget to '#include <assert.h>'? 8 | #include <plat/common/platform.h> +++ |+#include <assert.h> 9 | cc1: all warnings being treated as errors
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Change-Id: I486bd695298798c05008158545668020babb3eca
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| 944e7ea9 | 16-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra 8.3 warnings
MISRA Violation: MISRA-C:2012 R.8.3 - Declaration uses a different parameter name than the one present in the definition.
Signed-off-by: Venkatesh Yadav Abba
fix(zynqmp): resolve misra 8.3 warnings
MISRA Violation: MISRA-C:2012 R.8.3 - Declaration uses a different parameter name than the one present in the definition.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: Id0521afd7383df13870710b7dd2894e788896e5e
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| 420c400a | 16-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I2fcf13b7,I153ccb43 into integration
* changes: feat(n1sdp): add support for nt_fw_config feat(n1sdp): enable trusted board boot on n1sdp |
| 610eeac8 | 16-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra R8.4 warnings
MISRA Violation: MISRA-C:2012 R.8.4 - Function definition does not have a visible prototype.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xil
fix(zynqmp): resolve misra R8.4 warnings
MISRA Violation: MISRA-C:2012 R.8.4 - Function definition does not have a visible prototype.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I50a2c1adf2e099217770ac665f135302f990b162
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| a921da5e | 13-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes If2408af3,If485ff27 into integration
* changes: feat(versal): add SMCCC call TF_A_PM_REGISTER_SGI feat(versal): add support to reset SGI |
| 0dc2b516 | 13-May-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ns/save_fpregs_context" into integration
* changes: feat(sgi): enable fpregs context save and restore feat(spm_mm): add support to save and restore fp regs |
| 6aed5549 | 13-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "rss/mboot-attest" into integration
* changes: docs(maintainers): add PSA, MHU, RSS comms code owners feat(plat/arm/fvp): enable RSS backend based measured boot feat(l
Merge changes from topic "rss/mboot-attest" into integration
* changes: docs(maintainers): add PSA, MHU, RSS comms code owners feat(plat/arm/fvp): enable RSS backend based measured boot feat(lib/psa): mock PSA APIs feat(drivers/measured_boot): add RSS backend feat(drivers/arm/rss): add RSS communication driver feat(lib/psa): add initial attestation API feat(lib/psa): add measured boot API feat(drivers/arm/mhu): add MHU driver
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| 0d19eda0 | 13-May-2022 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): remove unused printout
This patch is to remove unused printout.
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: I507210402dcbaf8369209308ae1fcedaccb0292d |
| 673afd6f | 13-May-2022 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): fix configuration status based on start request
This patch is to fix configuration status command now returns the result based on the last config start command made to the runtime softwa
fix(intel): fix configuration status based on start request
This patch is to fix configuration status command now returns the result based on the last config start command made to the runtime software. The status type can be either: - NO_REQUEST (default) - RECONFIGURATION - BITSTREAM_AUTH
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: I1ce4b7b4c741d88de88778f8fbed7dfe83a39fbc
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| 762c34a8 | 13-May-2022 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
style(intel): align the sequence in header file
This patch is to align the sequence of function in header file.
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: I9658aef78b06b744c6
style(intel): align the sequence in header file
This patch is to align the sequence of function in header file.
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: I9658aef78b06b744c6c14f95b2821daf5dbb0082
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| 58690cd6 | 13-May-2022 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): remove redundant NOC header declarations
This patch is to remove redundant NOC declarations in system manager header file. The NOC headers are shareable across both Stratix 10 and Agilex
fix(intel): remove redundant NOC header declarations
This patch is to remove redundant NOC declarations in system manager header file. The NOC headers are shareable across both Stratix 10 and Agilex platforms.
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: I40ff55eb1d8fe280db1d099d5d1a3c2bf4b4b459
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| fcf6f469 | 14-Dec-2021 |
Tanmay Shah <tanmay.shah@xilinx.com> |
feat(versal): add SMCCC call TF_A_PM_REGISTER_SGI
This call is used to register and reset SGI interrupt. Before this functionality was performed using IOCTL_REGISTER_SGI pm_ioctl EEMI call. It's not
feat(versal): add SMCCC call TF_A_PM_REGISTER_SGI
This call is used to register and reset SGI interrupt. Before this functionality was performed using IOCTL_REGISTER_SGI pm_ioctl EEMI call. It's not correct use of PM_IOCTL as it is not EEMI functionality. Instead this new SMCCC call will be handled by TF-A specific handler.
Change-Id: If2408af38b889d29a5c584e8eec5f1672eab4fb5 Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
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| bf70449b | 19-Apr-2021 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
feat(versal): add support to reset SGI
Add "reset" parameter in pm_register_sgi() to reset SGI number. This will be required if OS wants to reset SGI number to default state. Caller can reset param
feat(versal): add support to reset SGI
Add "reset" parameter in pm_register_sgi() to reset SGI number. This will be required if OS wants to reset SGI number to default state. Caller can reset param to 1 to reset SGI in ATF.
Change-Id: If485ff275df884f74eb67671cac7fa953458afe9 Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
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| cf85030e | 15-Mar-2022 |
sahil <sahil@arm.com> |
feat(n1sdp): add support for nt_fw_config
This patch adds support to load nt_fw_config with the information from plat_info sds structure which is then passed from BL2 to BL33.
Signed-off-by: sahil
feat(n1sdp): add support for nt_fw_config
This patch adds support to load nt_fw_config with the information from plat_info sds structure which is then passed from BL2 to BL33.
Signed-off-by: sahil <sahil@arm.com> Change-Id: I2fcf13b7bf5ab042ef830157fd9cceedbdca617a
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| fe2b37f6 | 06-Jun-2021 |
sah01 <sahil@arm.com> |
feat(n1sdp): enable trusted board boot on n1sdp
Move from RESET_TO_BL31 boot to a TBBR style boot on N1sdp.
Signed-off-by: sahil <sahil@arm.com> Change-Id: I153ccb43a4a013830973c7a183825d62b372c65e |
| 868f9768 | 12-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes Ie9451e35,I1815deeb,If277b2b3,Ie2ceaf24,I7996d505, ... into integration
* changes: fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD fix(intel): ex
Merge changes Ie9451e35,I1815deeb,If277b2b3,Ie2ceaf24,I7996d505, ... into integration
* changes: fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying fix(intel): extending to support large file size for SHA-2 ECDSA data signing and signature verifying fix(intel): extending to support large file size for AES encryption and decryption feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands fix(intel): update certificate mask for FPGA Attestation feat(intel): update to support maximum response data size feat(intel): support ECDSA HASH Verification feat(intel): support ECDSA HASH Signing feat(intel): support ECDH request feat(intel): support ECDSA SHA-2 Data Signature Verification feat(intel): support ECDSA SHA-2 Data Signing feat(intel): support ECDSA Get Public Key feat(intel): support session based SDOS encrypt and decrypt feat(intel): support AES Crypt Service feat(intel): support HMAC SHA-2 MAC verify request feat(intel): support SHA-2 hash digest generation on a blob feat(intel): support extended random number generation feat(intel): support crypto service key operation feat(intel): support crypto service session feat(intel): extend attestation service to Agilex family fix(intel): flush dcache before sending certificate to mailbox fix(intel): introduce a generic response error code fix(intel): allow non-secure access to FPGA Crypto Services (FCS) feat(intel): single certificate feature enablement feat(intel): initial commit for attestation service fix(intel): update encryption and decryption command logic
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