1 /* 2 * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <inttypes.h> 10 #include <stdint.h> 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <arch_features.h> 15 #include <bl31/bl31.h> 16 #include <common/debug.h> 17 #include <common/runtime_svc.h> 18 #include <context.h> 19 #include <lib/el3_runtime/context_mgmt.h> 20 #include <lib/el3_runtime/pubsub.h> 21 #include <lib/gpt_rme/gpt_rme.h> 22 23 #include <lib/spinlock.h> 24 #include <lib/utils.h> 25 #include <lib/xlat_tables/xlat_tables_v2.h> 26 #include <plat/common/common_def.h> 27 #include <plat/common/platform.h> 28 #include <platform_def.h> 29 #include <services/rmmd_svc.h> 30 #include <smccc_helpers.h> 31 #include <lib/extensions/sve.h> 32 #include "rmmd_initial_context.h" 33 #include "rmmd_private.h" 34 35 /******************************************************************************* 36 * RMM <-> EL3 shared buffer information. 37 ******************************************************************************/ 38 static size_t shared_buf_size; 39 static uintptr_t shared_buf_base; 40 41 /******************************************************************************* 42 * RMM boot failure flag 43 ******************************************************************************/ 44 static bool rmm_boot_failed; 45 46 /******************************************************************************* 47 * RMM context information. 48 ******************************************************************************/ 49 rmmd_rmm_context_t rmm_context[PLATFORM_CORE_COUNT]; 50 51 /******************************************************************************* 52 * RMM entry point information. Discovered on the primary core and reused 53 * on secondary cores. 54 ******************************************************************************/ 55 static entry_point_info_t *rmm_ep_info; 56 57 /******************************************************************************* 58 * Static function declaration. 59 ******************************************************************************/ 60 static int32_t rmm_init(void); 61 62 /******************************************************************************* 63 * This function takes an RMM context pointer and performs a synchronous entry 64 * into it. 65 ******************************************************************************/ 66 uint64_t rmmd_rmm_sync_entry(rmmd_rmm_context_t *rmm_ctx) 67 { 68 uint64_t rc; 69 70 assert(rmm_ctx != NULL); 71 72 cm_set_context(&(rmm_ctx->cpu_ctx), REALM); 73 74 /* Restore the realm context assigned above */ 75 cm_el1_sysregs_context_restore(REALM); 76 cm_el2_sysregs_context_restore(REALM); 77 cm_set_next_eret_context(REALM); 78 79 /* Enter RMM */ 80 rc = rmmd_rmm_enter(&rmm_ctx->c_rt_ctx); 81 82 /* 83 * Save realm context. EL1 and EL2 Non-secure 84 * contexts will be restored before exiting to 85 * Non-secure world, therefore there is no need 86 * to clear EL1 and EL2 context registers. 87 */ 88 cm_el1_sysregs_context_save(REALM); 89 cm_el2_sysregs_context_save(REALM); 90 91 return rc; 92 } 93 94 /******************************************************************************* 95 * This function returns to the place where rmmd_rmm_sync_entry() was 96 * called originally. 97 ******************************************************************************/ 98 __dead2 void rmmd_rmm_sync_exit(uint64_t rc) 99 { 100 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 101 102 /* Get context of the RMM in use by this CPU. */ 103 assert(cm_get_context(REALM) == &(ctx->cpu_ctx)); 104 105 /* 106 * The RMMD must have initiated the original request through a 107 * synchronous entry into RMM. Jump back to the original C runtime 108 * context with the value of rc in x0; 109 */ 110 rmmd_rmm_exit(ctx->c_rt_ctx, rc); 111 112 panic(); 113 } 114 115 static void rmm_el2_context_init(el2_sysregs_t *regs) 116 { 117 regs->ctx_regs[CTX_SPSR_EL2 >> 3] = REALM_SPSR_EL2; 118 regs->ctx_regs[CTX_SCTLR_EL2 >> 3] = SCTLR_EL2_RES1; 119 } 120 121 /******************************************************************************* 122 * Enable architecture extensions on first entry to Realm world. 123 ******************************************************************************/ 124 static void manage_extensions_realm(cpu_context_t *ctx) 125 { 126 #if ENABLE_SVE_FOR_NS 127 /* 128 * Enable SVE and FPU in realm context when it is enabled for NS. 129 * Realm manager must ensure that the SVE and FPU register 130 * contexts are properly managed. 131 */ 132 sve_enable(ctx); 133 #else 134 /* 135 * Disable SVE and FPU in realm context when it is disabled for NS. 136 */ 137 sve_disable(ctx); 138 #endif /* ENABLE_SVE_FOR_NS */ 139 } 140 141 /******************************************************************************* 142 * Jump to the RMM for the first time. 143 ******************************************************************************/ 144 static int32_t rmm_init(void) 145 { 146 long rc; 147 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 148 149 INFO("RMM init start.\n"); 150 151 /* Enable architecture extensions */ 152 manage_extensions_realm(&ctx->cpu_ctx); 153 154 /* Initialize RMM EL2 context. */ 155 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx); 156 157 rc = rmmd_rmm_sync_entry(ctx); 158 if (rc != E_RMM_BOOT_SUCCESS) { 159 ERROR("RMM init failed: %ld\n", rc); 160 /* Mark the boot as failed for all the CPUs */ 161 rmm_boot_failed = true; 162 return 0; 163 } 164 165 INFO("RMM init end.\n"); 166 167 return 1; 168 } 169 170 /******************************************************************************* 171 * Load and read RMM manifest, setup RMM. 172 ******************************************************************************/ 173 int rmmd_setup(void) 174 { 175 uint32_t ep_attr; 176 unsigned int linear_id = plat_my_core_pos(); 177 rmmd_rmm_context_t *rmm_ctx = &rmm_context[linear_id]; 178 179 /* Make sure RME is supported. */ 180 assert(get_armv9_2_feat_rme_support() != 0U); 181 182 rmm_ep_info = bl31_plat_get_next_image_ep_info(REALM); 183 if (rmm_ep_info == NULL) { 184 WARN("No RMM image provided by BL2 boot loader, Booting " 185 "device without RMM initialization. SMCs destined for " 186 "RMM will return SMC_UNK\n"); 187 return -ENOENT; 188 } 189 190 /* Under no circumstances will this parameter be 0 */ 191 assert(rmm_ep_info->pc == RMM_BASE); 192 193 /* Initialise an entrypoint to set up the CPU context */ 194 ep_attr = EP_REALM; 195 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0U) { 196 ep_attr |= EP_EE_BIG; 197 } 198 199 SET_PARAM_HEAD(rmm_ep_info, PARAM_EP, VERSION_1, ep_attr); 200 rmm_ep_info->spsr = SPSR_64(MODE_EL2, 201 MODE_SP_ELX, 202 DISABLE_ALL_EXCEPTIONS); 203 204 shared_buf_size = 205 plat_rmmd_get_el3_rmm_shared_mem(&shared_buf_base); 206 207 assert((shared_buf_size == SZ_4K) && 208 ((void *)shared_buf_base != NULL)); 209 210 /* 211 * Prepare coldboot arguments for RMM: 212 * arg0: This CPUID (primary processor). 213 * arg1: Version for this Boot Interface. 214 * arg2: PLATFORM_CORE_COUNT. 215 * arg3: Base address for the EL3 <-> RMM shared area. The boot 216 * manifest will be stored at the beginning of this area. 217 */ 218 rmm_ep_info->args.arg0 = linear_id; 219 rmm_ep_info->args.arg1 = RMM_EL3_INTERFACE_VERSION; 220 rmm_ep_info->args.arg2 = PLATFORM_CORE_COUNT; 221 rmm_ep_info->args.arg3 = shared_buf_base; 222 223 /* Initialise RMM context with this entry point information */ 224 cm_setup_context(&rmm_ctx->cpu_ctx, rmm_ep_info); 225 226 INFO("RMM setup done.\n"); 227 228 /* Register init function for deferred init. */ 229 bl31_register_rmm_init(&rmm_init); 230 231 return 0; 232 } 233 234 /******************************************************************************* 235 * Forward SMC to the other security state 236 ******************************************************************************/ 237 static uint64_t rmmd_smc_forward(uint32_t src_sec_state, 238 uint32_t dst_sec_state, uint64_t x0, 239 uint64_t x1, uint64_t x2, uint64_t x3, 240 uint64_t x4, void *handle) 241 { 242 /* Save incoming security state */ 243 cm_el1_sysregs_context_save(src_sec_state); 244 cm_el2_sysregs_context_save(src_sec_state); 245 246 /* Restore outgoing security state */ 247 cm_el1_sysregs_context_restore(dst_sec_state); 248 cm_el2_sysregs_context_restore(dst_sec_state); 249 cm_set_next_eret_context(dst_sec_state); 250 251 /* 252 * As per SMCCCv1.1, we need to preserve x4 to x7 unless 253 * being used as return args. Hence we differentiate the 254 * onward and backward path. Support upto 8 args in the 255 * onward path and 4 args in return path. 256 */ 257 if (src_sec_state == NON_SECURE) { 258 SMC_RET8(cm_get_context(dst_sec_state), x0, x1, x2, x3, x4, 259 SMC_GET_GP(handle, CTX_GPREG_X5), 260 SMC_GET_GP(handle, CTX_GPREG_X6), 261 SMC_GET_GP(handle, CTX_GPREG_X7)); 262 } else { 263 SMC_RET4(cm_get_context(dst_sec_state), x0, x1, x2, x3); 264 } 265 } 266 267 /******************************************************************************* 268 * This function handles all SMCs in the range reserved for RMI. Each call is 269 * either forwarded to the other security state or handled by the RMM dispatcher 270 ******************************************************************************/ 271 uint64_t rmmd_rmi_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 272 uint64_t x3, uint64_t x4, void *cookie, 273 void *handle, uint64_t flags) 274 { 275 uint32_t src_sec_state; 276 277 /* If RMM failed to boot, treat any RMI SMC as unknown */ 278 if (rmm_boot_failed) { 279 WARN("RMMD: Failed to boot up RMM. Ignoring RMI call\n"); 280 SMC_RET1(handle, SMC_UNK); 281 } 282 283 /* Determine which security state this SMC originated from */ 284 src_sec_state = caller_sec_state(flags); 285 286 /* RMI must not be invoked by the Secure world */ 287 if (src_sec_state == SMC_FROM_SECURE) { 288 WARN("RMMD: RMI invoked by secure world.\n"); 289 SMC_RET1(handle, SMC_UNK); 290 } 291 292 /* 293 * Forward an RMI call from the Normal world to the Realm world as it 294 * is. 295 */ 296 if (src_sec_state == SMC_FROM_NON_SECURE) { 297 VERBOSE("RMMD: RMI call from non-secure world.\n"); 298 return rmmd_smc_forward(NON_SECURE, REALM, smc_fid, 299 x1, x2, x3, x4, handle); 300 } 301 302 if (src_sec_state != SMC_FROM_REALM) { 303 SMC_RET1(handle, SMC_UNK); 304 } 305 306 switch (smc_fid) { 307 case RMMD_RMI_REQ_COMPLETE: 308 return rmmd_smc_forward(REALM, NON_SECURE, x1, 309 x2, x3, x4, 0, handle); 310 311 default: 312 WARN("RMMD: Unsupported RMM call 0x%08x\n", smc_fid); 313 SMC_RET1(handle, SMC_UNK); 314 } 315 } 316 317 /******************************************************************************* 318 * This cpu has been turned on. Enter RMM to initialise R-EL2. Entry into RMM 319 * is done after initialising minimal architectural state that guarantees safe 320 * execution. 321 ******************************************************************************/ 322 static void *rmmd_cpu_on_finish_handler(const void *arg) 323 { 324 long rc; 325 uint32_t linear_id = plat_my_core_pos(); 326 rmmd_rmm_context_t *ctx = &rmm_context[linear_id]; 327 328 if (rmm_boot_failed) { 329 /* RMM Boot failed on a previous CPU. Abort. */ 330 ERROR("RMM Failed to initialize. Ignoring for CPU%d\n", 331 linear_id); 332 return NULL; 333 } 334 335 /* 336 * Prepare warmboot arguments for RMM: 337 * arg0: This CPUID. 338 * arg1 to arg3: Not used. 339 */ 340 rmm_ep_info->args.arg0 = linear_id; 341 rmm_ep_info->args.arg1 = 0ULL; 342 rmm_ep_info->args.arg2 = 0ULL; 343 rmm_ep_info->args.arg3 = 0ULL; 344 345 /* Initialise RMM context with this entry point information */ 346 cm_setup_context(&ctx->cpu_ctx, rmm_ep_info); 347 348 /* Enable architecture extensions */ 349 manage_extensions_realm(&ctx->cpu_ctx); 350 351 /* Initialize RMM EL2 context. */ 352 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx); 353 354 rc = rmmd_rmm_sync_entry(ctx); 355 356 if (rc != E_RMM_BOOT_SUCCESS) { 357 ERROR("RMM init failed on CPU%d: %ld\n", linear_id, rc); 358 /* Mark the boot as failed for any other booting CPU */ 359 rmm_boot_failed = true; 360 } 361 362 return NULL; 363 } 364 365 /* Subscribe to PSCI CPU on to initialize RMM on secondary */ 366 SUBSCRIBE_TO_EVENT(psci_cpu_on_finish, rmmd_cpu_on_finish_handler); 367 368 /* Convert GPT lib error to RMMD GTS error */ 369 static int gpt_to_gts_error(int error, uint32_t smc_fid, uint64_t address) 370 { 371 int ret; 372 373 if (error == 0) { 374 return RMMD_OK; 375 } 376 377 if (error == -EINVAL) { 378 ret = RMMD_ERR_BAD_ADDR; 379 } else { 380 /* This is the only other error code we expect */ 381 assert(error == -EPERM); 382 ret = RMMD_ERR_BAD_PAS; 383 } 384 385 ERROR("RMMD: PAS Transition failed. GPT ret = %d, PA: 0x%"PRIx64 ", FID = 0x%x\n", 386 error, address, smc_fid); 387 return ret; 388 } 389 390 /******************************************************************************* 391 * This function handles RMM-EL3 interface SMCs 392 ******************************************************************************/ 393 uint64_t rmmd_rmm_el3_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 394 uint64_t x3, uint64_t x4, void *cookie, 395 void *handle, uint64_t flags) 396 { 397 uint32_t src_sec_state; 398 int ret; 399 400 /* If RMM failed to boot, treat any RMM-EL3 interface SMC as unknown */ 401 if (rmm_boot_failed) { 402 WARN("RMMD: Failed to boot up RMM. Ignoring RMM-EL3 call\n"); 403 SMC_RET1(handle, SMC_UNK); 404 } 405 406 /* Determine which security state this SMC originated from */ 407 src_sec_state = caller_sec_state(flags); 408 409 if (src_sec_state != SMC_FROM_REALM) { 410 WARN("RMMD: RMM-EL3 call originated from secure or normal world\n"); 411 SMC_RET1(handle, SMC_UNK); 412 } 413 414 switch (smc_fid) { 415 case RMMD_GTSI_DELEGATE: 416 ret = gpt_delegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 417 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 418 case RMMD_GTSI_UNDELEGATE: 419 ret = gpt_undelegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 420 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 421 case RMMD_ATTEST_GET_PLAT_TOKEN: 422 ret = rmmd_attest_get_platform_token(x1, &x2, x3); 423 SMC_RET2(handle, ret, x2); 424 case RMMD_ATTEST_GET_REALM_KEY: 425 ret = rmmd_attest_get_signing_key(x1, &x2, x3); 426 SMC_RET2(handle, ret, x2); 427 428 case RMM_BOOT_COMPLETE: 429 VERBOSE("RMMD: running rmmd_rmm_sync_exit\n"); 430 rmmd_rmm_sync_exit(x1); 431 432 default: 433 WARN("RMMD: Unsupported RMM-EL3 call 0x%08x\n", smc_fid); 434 SMC_RET1(handle, SMC_UNK); 435 } 436 } 437