1 /* 2 * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <inttypes.h> 10 #include <stdint.h> 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <arch_features.h> 15 #include <bl31/bl31.h> 16 #include <common/debug.h> 17 #include <common/runtime_svc.h> 18 #include <context.h> 19 #include <lib/el3_runtime/context_mgmt.h> 20 #include <lib/el3_runtime/pubsub.h> 21 #include <lib/gpt_rme/gpt_rme.h> 22 23 #include <lib/spinlock.h> 24 #include <lib/utils.h> 25 #include <lib/xlat_tables/xlat_tables_v2.h> 26 #include <plat/common/common_def.h> 27 #include <plat/common/platform.h> 28 #include <platform_def.h> 29 #include <services/rmmd_svc.h> 30 #include <smccc_helpers.h> 31 #include <lib/extensions/sve.h> 32 #include "rmmd_initial_context.h" 33 #include "rmmd_private.h" 34 35 /******************************************************************************* 36 * RMM boot failure flag 37 ******************************************************************************/ 38 static bool rmm_boot_failed; 39 40 /******************************************************************************* 41 * RMM context information. 42 ******************************************************************************/ 43 rmmd_rmm_context_t rmm_context[PLATFORM_CORE_COUNT]; 44 45 /******************************************************************************* 46 * RMM entry point information. Discovered on the primary core and reused 47 * on secondary cores. 48 ******************************************************************************/ 49 static entry_point_info_t *rmm_ep_info; 50 51 /******************************************************************************* 52 * Static function declaration. 53 ******************************************************************************/ 54 static int32_t rmm_init(void); 55 56 /******************************************************************************* 57 * This function takes an RMM context pointer and performs a synchronous entry 58 * into it. 59 ******************************************************************************/ 60 uint64_t rmmd_rmm_sync_entry(rmmd_rmm_context_t *rmm_ctx) 61 { 62 uint64_t rc; 63 64 assert(rmm_ctx != NULL); 65 66 cm_set_context(&(rmm_ctx->cpu_ctx), REALM); 67 68 /* Restore the realm context assigned above */ 69 cm_el1_sysregs_context_restore(REALM); 70 cm_el2_sysregs_context_restore(REALM); 71 cm_set_next_eret_context(REALM); 72 73 /* Enter RMM */ 74 rc = rmmd_rmm_enter(&rmm_ctx->c_rt_ctx); 75 76 /* 77 * Save realm context. EL1 and EL2 Non-secure 78 * contexts will be restored before exiting to 79 * Non-secure world, therefore there is no need 80 * to clear EL1 and EL2 context registers. 81 */ 82 cm_el1_sysregs_context_save(REALM); 83 cm_el2_sysregs_context_save(REALM); 84 85 return rc; 86 } 87 88 /******************************************************************************* 89 * This function returns to the place where rmmd_rmm_sync_entry() was 90 * called originally. 91 ******************************************************************************/ 92 __dead2 void rmmd_rmm_sync_exit(uint64_t rc) 93 { 94 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 95 96 /* Get context of the RMM in use by this CPU. */ 97 assert(cm_get_context(REALM) == &(ctx->cpu_ctx)); 98 99 /* 100 * The RMMD must have initiated the original request through a 101 * synchronous entry into RMM. Jump back to the original C runtime 102 * context with the value of rc in x0; 103 */ 104 rmmd_rmm_exit(ctx->c_rt_ctx, rc); 105 106 panic(); 107 } 108 109 static void rmm_el2_context_init(el2_sysregs_t *regs) 110 { 111 regs->ctx_regs[CTX_SPSR_EL2 >> 3] = REALM_SPSR_EL2; 112 regs->ctx_regs[CTX_SCTLR_EL2 >> 3] = SCTLR_EL2_RES1; 113 } 114 115 /******************************************************************************* 116 * Enable architecture extensions on first entry to Realm world. 117 ******************************************************************************/ 118 static void manage_extensions_realm(cpu_context_t *ctx) 119 { 120 #if ENABLE_SVE_FOR_NS 121 /* 122 * Enable SVE and FPU in realm context when it is enabled for NS. 123 * Realm manager must ensure that the SVE and FPU register 124 * contexts are properly managed. 125 */ 126 sve_enable(ctx); 127 #else 128 /* 129 * Disable SVE and FPU in realm context when it is disabled for NS. 130 */ 131 sve_disable(ctx); 132 #endif /* ENABLE_SVE_FOR_NS */ 133 } 134 135 /******************************************************************************* 136 * Jump to the RMM for the first time. 137 ******************************************************************************/ 138 static int32_t rmm_init(void) 139 { 140 long rc; 141 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 142 143 INFO("RMM init start.\n"); 144 145 /* Enable architecture extensions */ 146 manage_extensions_realm(&ctx->cpu_ctx); 147 148 /* Initialize RMM EL2 context. */ 149 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx); 150 151 rc = rmmd_rmm_sync_entry(ctx); 152 if (rc != E_RMM_BOOT_SUCCESS) { 153 ERROR("RMM init failed: %ld\n", rc); 154 /* Mark the boot as failed for all the CPUs */ 155 rmm_boot_failed = true; 156 return 0; 157 } 158 159 INFO("RMM init end.\n"); 160 161 return 1; 162 } 163 164 /******************************************************************************* 165 * Load and read RMM manifest, setup RMM. 166 ******************************************************************************/ 167 int rmmd_setup(void) 168 { 169 size_t shared_buf_size __unused; 170 uintptr_t shared_buf_base; 171 uint32_t ep_attr; 172 unsigned int linear_id = plat_my_core_pos(); 173 rmmd_rmm_context_t *rmm_ctx = &rmm_context[linear_id]; 174 175 /* Make sure RME is supported. */ 176 assert(get_armv9_2_feat_rme_support() != 0U); 177 178 rmm_ep_info = bl31_plat_get_next_image_ep_info(REALM); 179 if (rmm_ep_info == NULL) { 180 WARN("No RMM image provided by BL2 boot loader, Booting " 181 "device without RMM initialization. SMCs destined for " 182 "RMM will return SMC_UNK\n"); 183 return -ENOENT; 184 } 185 186 /* Under no circumstances will this parameter be 0 */ 187 assert(rmm_ep_info->pc == RMM_BASE); 188 189 /* Initialise an entrypoint to set up the CPU context */ 190 ep_attr = EP_REALM; 191 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0U) { 192 ep_attr |= EP_EE_BIG; 193 } 194 195 SET_PARAM_HEAD(rmm_ep_info, PARAM_EP, VERSION_1, ep_attr); 196 rmm_ep_info->spsr = SPSR_64(MODE_EL2, 197 MODE_SP_ELX, 198 DISABLE_ALL_EXCEPTIONS); 199 200 shared_buf_size = 201 plat_rmmd_get_el3_rmm_shared_mem(&shared_buf_base); 202 203 assert((shared_buf_size == SZ_4K) && 204 ((void *)shared_buf_base != NULL)); 205 206 /* 207 * Prepare coldboot arguments for RMM: 208 * arg0: This CPUID (primary processor). 209 * arg1: Version for this Boot Interface. 210 * arg2: PLATFORM_CORE_COUNT. 211 * arg3: Base address for the EL3 <-> RMM shared area. The boot 212 * manifest will be stored at the beginning of this area. 213 */ 214 rmm_ep_info->args.arg0 = linear_id; 215 rmm_ep_info->args.arg1 = RMM_EL3_INTERFACE_VERSION; 216 rmm_ep_info->args.arg2 = PLATFORM_CORE_COUNT; 217 rmm_ep_info->args.arg3 = shared_buf_base; 218 219 /* Initialise RMM context with this entry point information */ 220 cm_setup_context(&rmm_ctx->cpu_ctx, rmm_ep_info); 221 222 INFO("RMM setup done.\n"); 223 224 /* Register init function for deferred init. */ 225 bl31_register_rmm_init(&rmm_init); 226 227 return 0; 228 } 229 230 /******************************************************************************* 231 * Forward SMC to the other security state 232 ******************************************************************************/ 233 static uint64_t rmmd_smc_forward(uint32_t src_sec_state, 234 uint32_t dst_sec_state, uint64_t x0, 235 uint64_t x1, uint64_t x2, uint64_t x3, 236 uint64_t x4, void *handle) 237 { 238 /* Save incoming security state */ 239 cm_el1_sysregs_context_save(src_sec_state); 240 cm_el2_sysregs_context_save(src_sec_state); 241 242 /* Restore outgoing security state */ 243 cm_el1_sysregs_context_restore(dst_sec_state); 244 cm_el2_sysregs_context_restore(dst_sec_state); 245 cm_set_next_eret_context(dst_sec_state); 246 247 /* 248 * As per SMCCCv1.1, we need to preserve x4 to x7 unless 249 * being used as return args. Hence we differentiate the 250 * onward and backward path. Support upto 8 args in the 251 * onward path and 4 args in return path. 252 */ 253 if (src_sec_state == NON_SECURE) { 254 SMC_RET8(cm_get_context(dst_sec_state), x0, x1, x2, x3, x4, 255 SMC_GET_GP(handle, CTX_GPREG_X5), 256 SMC_GET_GP(handle, CTX_GPREG_X6), 257 SMC_GET_GP(handle, CTX_GPREG_X7)); 258 } else { 259 SMC_RET4(cm_get_context(dst_sec_state), x0, x1, x2, x3); 260 } 261 } 262 263 /******************************************************************************* 264 * This function handles all SMCs in the range reserved for RMI. Each call is 265 * either forwarded to the other security state or handled by the RMM dispatcher 266 ******************************************************************************/ 267 uint64_t rmmd_rmi_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 268 uint64_t x3, uint64_t x4, void *cookie, 269 void *handle, uint64_t flags) 270 { 271 uint32_t src_sec_state; 272 273 /* If RMM failed to boot, treat any RMI SMC as unknown */ 274 if (rmm_boot_failed) { 275 WARN("RMMD: Failed to boot up RMM. Ignoring RMI call\n"); 276 SMC_RET1(handle, SMC_UNK); 277 } 278 279 /* Determine which security state this SMC originated from */ 280 src_sec_state = caller_sec_state(flags); 281 282 /* RMI must not be invoked by the Secure world */ 283 if (src_sec_state == SMC_FROM_SECURE) { 284 WARN("RMMD: RMI invoked by secure world.\n"); 285 SMC_RET1(handle, SMC_UNK); 286 } 287 288 /* 289 * Forward an RMI call from the Normal world to the Realm world as it 290 * is. 291 */ 292 if (src_sec_state == SMC_FROM_NON_SECURE) { 293 VERBOSE("RMMD: RMI call from non-secure world.\n"); 294 return rmmd_smc_forward(NON_SECURE, REALM, smc_fid, 295 x1, x2, x3, x4, handle); 296 } 297 298 if (src_sec_state != SMC_FROM_REALM) { 299 SMC_RET1(handle, SMC_UNK); 300 } 301 302 switch (smc_fid) { 303 case RMMD_RMI_REQ_COMPLETE: 304 return rmmd_smc_forward(REALM, NON_SECURE, x1, 305 x2, x3, x4, 0, handle); 306 307 default: 308 WARN("RMMD: Unsupported RMM call 0x%08x\n", smc_fid); 309 SMC_RET1(handle, SMC_UNK); 310 } 311 } 312 313 /******************************************************************************* 314 * This cpu has been turned on. Enter RMM to initialise R-EL2. Entry into RMM 315 * is done after initialising minimal architectural state that guarantees safe 316 * execution. 317 ******************************************************************************/ 318 static void *rmmd_cpu_on_finish_handler(const void *arg) 319 { 320 long rc; 321 uint32_t linear_id = plat_my_core_pos(); 322 rmmd_rmm_context_t *ctx = &rmm_context[linear_id]; 323 324 if (rmm_boot_failed) { 325 /* RMM Boot failed on a previous CPU. Abort. */ 326 ERROR("RMM Failed to initialize. Ignoring for CPU%d\n", 327 linear_id); 328 return NULL; 329 } 330 331 /* 332 * Prepare warmboot arguments for RMM: 333 * arg0: This CPUID. 334 * arg1 to arg3: Not used. 335 */ 336 rmm_ep_info->args.arg0 = linear_id; 337 rmm_ep_info->args.arg1 = 0ULL; 338 rmm_ep_info->args.arg2 = 0ULL; 339 rmm_ep_info->args.arg3 = 0ULL; 340 341 /* Initialise RMM context with this entry point information */ 342 cm_setup_context(&ctx->cpu_ctx, rmm_ep_info); 343 344 /* Enable architecture extensions */ 345 manage_extensions_realm(&ctx->cpu_ctx); 346 347 /* Initialize RMM EL2 context. */ 348 rmm_el2_context_init(&ctx->cpu_ctx.el2_sysregs_ctx); 349 350 rc = rmmd_rmm_sync_entry(ctx); 351 352 if (rc != E_RMM_BOOT_SUCCESS) { 353 ERROR("RMM init failed on CPU%d: %ld\n", linear_id, rc); 354 /* Mark the boot as failed for any other booting CPU */ 355 rmm_boot_failed = true; 356 } 357 358 return NULL; 359 } 360 361 /* Subscribe to PSCI CPU on to initialize RMM on secondary */ 362 SUBSCRIBE_TO_EVENT(psci_cpu_on_finish, rmmd_cpu_on_finish_handler); 363 364 /* Convert GPT lib error to RMMD GTS error */ 365 static int gpt_to_gts_error(int error, uint32_t smc_fid, uint64_t address) 366 { 367 int ret; 368 369 if (error == 0) { 370 return E_RMM_OK; 371 } 372 373 if (error == -EINVAL) { 374 ret = E_RMM_BAD_ADDR; 375 } else { 376 /* This is the only other error code we expect */ 377 assert(error == -EPERM); 378 ret = E_RMM_BAD_PAS; 379 } 380 381 ERROR("RMMD: PAS Transition failed. GPT ret = %d, PA: 0x%"PRIx64 ", FID = 0x%x\n", 382 error, address, smc_fid); 383 return ret; 384 } 385 386 /******************************************************************************* 387 * This function handles RMM-EL3 interface SMCs 388 ******************************************************************************/ 389 uint64_t rmmd_rmm_el3_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 390 uint64_t x3, uint64_t x4, void *cookie, 391 void *handle, uint64_t flags) 392 { 393 uint32_t src_sec_state; 394 int ret; 395 396 /* If RMM failed to boot, treat any RMM-EL3 interface SMC as unknown */ 397 if (rmm_boot_failed) { 398 WARN("RMMD: Failed to boot up RMM. Ignoring RMM-EL3 call\n"); 399 SMC_RET1(handle, SMC_UNK); 400 } 401 402 /* Determine which security state this SMC originated from */ 403 src_sec_state = caller_sec_state(flags); 404 405 if (src_sec_state != SMC_FROM_REALM) { 406 WARN("RMMD: RMM-EL3 call originated from secure or normal world\n"); 407 SMC_RET1(handle, SMC_UNK); 408 } 409 410 switch (smc_fid) { 411 case RMMD_GTSI_DELEGATE: 412 ret = gpt_delegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 413 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 414 case RMMD_GTSI_UNDELEGATE: 415 ret = gpt_undelegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 416 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 417 case RMMD_ATTEST_GET_PLAT_TOKEN: 418 ret = rmmd_attest_get_platform_token(x1, &x2, x3); 419 SMC_RET2(handle, ret, x2); 420 case RMMD_ATTEST_GET_REALM_KEY: 421 ret = rmmd_attest_get_signing_key(x1, &x2, x3); 422 SMC_RET2(handle, ret, x2); 423 424 case RMM_BOOT_COMPLETE: 425 VERBOSE("RMMD: running rmmd_rmm_sync_exit\n"); 426 rmmd_rmm_sync_exit(x1); 427 428 default: 429 WARN("RMMD: Unsupported RMM-EL3 call 0x%08x\n", smc_fid); 430 SMC_RET1(handle, SMC_UNK); 431 } 432 } 433