| 512e0be0 | 13-Sep-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "feat(qemu): add "cortex-a710" cpu support" into integration |
| 03cf4e9a | 13-Sep-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(fvp): conditionally increase XLAT and MMAP table entries
The XLAT and MMAP table entries are increased as a part of this patch: 12fe591 , but this is causing failures for some builds, so conditi
fix(fvp): conditionally increase XLAT and MMAP table entries
The XLAT and MMAP table entries are increased as a part of this patch: 12fe591 , but this is causing failures for some builds, so conditionally increased the XLAT and MMAP table entries
Change-Id: I31e8c811bebc767d7187e045a35c9db0eef13ae0 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| cb27274c | 08-Aug-2023 |
Gauri Sahnan <Gauri.Sahnan@arm.com> |
fix(corstone-1000): add cpu_helpers.S to platform.mk
Add Platform related dependency in Makefile
Reviewed-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Signed-off-by: Gauri Sahnan <Gauri.S
fix(corstone-1000): add cpu_helpers.S to platform.mk
Add Platform related dependency in Makefile
Reviewed-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Signed-off-by: Gauri Sahnan <Gauri.Sahnan@arm.com> Change-Id: Idecb84233d3e0c386bf0b7f6d57cbebd38875f28
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| 409c20c8 | 13-Sep-2023 |
Mark-PK Tsai <mark-pk.tsai@mediatek.com> |
feat(qemu): add A55 cpu support for virt
Add support to "cortex-a55" cpu for "qemu" ('virt') platform.
Signed-off-by: Mark-PK Tsai <mark-pk.tsai@mediatek.com> Change-Id: I2693892be735eda91494b76732
feat(qemu): add A55 cpu support for virt
Add support to "cortex-a55" cpu for "qemu" ('virt') platform.
Signed-off-by: Mark-PK Tsai <mark-pk.tsai@mediatek.com> Change-Id: I2693892be735eda91494b767322935ddb63c9f48
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| 4734a62d | 12-Sep-2023 |
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> |
feat(qemu): add "cortex-a710" cpu support
Add support to qemu "cortex-a710" cpu for "qemu" platform.
CPU is supported by qemu/virt only as qemu/sbsa-ref memory starts at 2^40 which is limit for Cor
feat(qemu): add "cortex-a710" cpu support
Add support to qemu "cortex-a710" cpu for "qemu" platform.
CPU is supported by qemu/virt only as qemu/sbsa-ref memory starts at 2^40 which is limit for Cortex-A710.
Switched 'qemu' platform to be built as armv8.5 to cover features of new cpu core.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Change-Id: I035790eac41b2caf7f13167e53f48c16f0827754
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| 55e37408 | 12-Sep-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(arm): avoid setting HASH_PREREQUISITES for a build without ROT_KEY" into integration |
| 13ff6e9d | 12-Sep-2023 |
Michal Simek <michal.simek@amd.com> |
chore: remove MULTI_CONSOLE_API references
MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c99 ("Remove MULTI_CONSOLE_API flag and references to it") that's why remove reference
chore: remove MULTI_CONSOLE_API references
MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c99 ("Remove MULTI_CONSOLE_API flag and references to it") that's why remove references in platform.mk files and also in one rst which is not valid anymore.
Change-Id: I45f8e7db0a14ce63de62509100d8159b7aca2657 Signed-off-by: Michal Simek <michal.simek@amd.com>
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| bc6bd65b | 12-Sep-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "mb/spm+rme-tb-mb-support" into integration
* changes: fix(fvp): increase the maximum size of Event Log fix(fvp): increase maximum MMAP and XLAT entries count fix(arm)
Merge changes from topic "mb/spm+rme-tb-mb-support" into integration
* changes: fix(fvp): increase the maximum size of Event Log fix(fvp): increase maximum MMAP and XLAT entries count fix(arm): add Event Log area behind Trustzone Controller fix(tbbr): unrecognised 'tos-fw-key-cert' option
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| e5839ed7 | 14-Jun-2023 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp2): generate stm32 file
To be able to boot, STM32MPU platforms require the BL2 binary (together with its DT) to be preceded with an STM32 header. Add the required files and macro to prop
feat(stm32mp2): generate stm32 file
To be able to boot, STM32MPU platforms require the BL2 binary (together with its DT) to be preceded with an STM32 header. Add the required files and macro to properly generate this header.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I675de2c5cb733fe9d9e9baf76a941741a06dfac8
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| 87a940e0 | 14-Jun-2023 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp2): add console configuration
Use UART driver and fill helpers for crash console. Add early console setup in bl2_el3_early_platform_setup().
Signed-off-by: Yann Gautier <yann.gautier@st
feat(stm32mp2): add console configuration
Use UART driver and fill helpers for crash console. Add early console setup in bl2_el3_early_platform_setup().
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Ifb39554214dec05dafe4e306f8754e1454cdab61
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| 35527fb4 | 14-Jun-2023 |
Yann Gautier <yann.gautier@st.com> |
feat(st): introduce new platform STM32MP2
This new STMicroelectronics SoC is based on a dual Cortex-A35. For the moment, only BL2 is compiled with the common parts for ST platforms.
Change-Id: I1bc
feat(st): introduce new platform STM32MP2
This new STMicroelectronics SoC is based on a dual Cortex-A35. For the moment, only BL2 is compiled with the common parts for ST platforms.
Change-Id: I1bc4e6835dba4230359ea9b26d736791e27258aa Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 954048f4 | 14-Jun-2023 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): move plat_image_load.c
This file is common for ST platforms, move it to plat/st/common/.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I7cefbc7f857d4ea63320042988c86d28
refactor(st): move plat_image_load.c
This file is common for ST platforms, move it to plat/st/common/.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I7cefbc7f857d4ea63320042988c86d28e8a3cc09
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| cff2b114 | 17-Mar-2022 |
Pascal Paillet <p.paillet@st.com> |
refactor(st): rename PLAT_NB_FIXED_REGS
Rename PLAT_NB_FIXED_REGS to PLAT_NB_FIXED_REGUS. This avoids confusion with regulators and registers.
Signed-off-by: Pascal Paillet <p.paillet@st.com> Chang
refactor(st): rename PLAT_NB_FIXED_REGS
Rename PLAT_NB_FIXED_REGS to PLAT_NB_FIXED_REGUS. This avoids confusion with regulators and registers.
Signed-off-by: Pascal Paillet <p.paillet@st.com> Change-Id: Idb2de7204fe978ffcdd729e6cbe453e85fd089b5
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| b4939bef | 31-Aug-2023 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): move some storage definitions to common part
Those storage macros are common to all STM32MPU chips, move them to plat/st/common/include/stm32mp_io_storage.h
Signed-off-by: Yann Gautie
refactor(st): move some storage definitions to common part
Those storage macros are common to all STM32MPU chips, move them to plat/st/common/include/stm32mp_io_storage.h
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Id20ec00ba65edf9ec7a3a89adfda307c954c3cb6
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| 136f632f | 30-Jun-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(st): move SDMMC definitions to driver
Those specific SDMMC definitions are only used in stm32_sdmmc2.c driver. Move them there.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Chang
refactor(st): move SDMMC definitions to driver
Those specific SDMMC definitions are only used in stm32_sdmmc2.c driver. Move them there.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Iac7e505e9421aa7630bee8ce6fc2277b98581995
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| dad71816 | 09-Sep-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(st): allow AARCH64 compilation for common code
Use read_sctlr_el3() for aarch64 code instead of read_sctlr().
Change-Id: I17b5d1f8cb2918de6ab1d2d56c15cabca0ed43fd Signed-off-by: Yann Gautier <
feat(st): allow AARCH64 compilation for common code
Use read_sctlr_el3() for aarch64 code instead of read_sctlr().
Change-Id: I17b5d1f8cb2918de6ab1d2d56c15cabca0ed43fd Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| b0ce4024 | 31-Aug-2020 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): rename QSPI macros
To have a more generic code, remove the Q from the *QSPI macros.
Change-Id: I2fa94b54054036c2175df3dfddcb76eec1119ad2 Signed-off-by: Yann Gautier <yann.gautier@st.c
refactor(st): rename QSPI macros
To have a more generic code, remove the Q from the *QSPI macros.
Change-Id: I2fa94b54054036c2175df3dfddcb76eec1119ad2 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| f1dfaa42 | 01-Sep-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(fvp): increase the maximum size of Event Log
To make room for all image measurements using the RME+SPM+TBB+MEASURED_BOOT test configuration, the Event Log's maximum size has been significantly i
fix(fvp): increase the maximum size of Event Log
To make room for all image measurements using the RME+SPM+TBB+MEASURED_BOOT test configuration, the Event Log's maximum size has been significantly increased.
Change-Id: I0b9948dab893e14677bca0afa07167648a6c2729 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 12fe591b | 01-Sep-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(fvp): increase maximum MMAP and XLAT entries count
Maximum entries for MMAP and XLAT have been increased in order to support the configuration SPM+RME, along with MEASURED_BOOT and TRUSTED_BOARD
fix(fvp): increase maximum MMAP and XLAT entries count
Maximum entries for MMAP and XLAT have been increased in order to support the configuration SPM+RME, along with MEASURED_BOOT and TRUSTED_BOARD_BOOT.
Change-Id: Ic0a0aefecb49d7ccc71357c4bd94e7bd2e5f57c4 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 8e2fd6a8 | 07-Sep-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
feat(qemu): add dummy plat_mboot_measure_key() BL1 function
Adds a dummy implementation of the plat_mboot_measure_key() function in BL1 for QEMU platform.
Signed-off-by: Jens Wiklander <jens.wiklan
feat(qemu): add dummy plat_mboot_measure_key() BL1 function
Adds a dummy implementation of the plat_mboot_measure_key() function in BL1 for QEMU platform.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Change-Id: I5923aad962a5e34d657cf49c177e68ed2ea93291
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| bf2fa7e3 | 07-Sep-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(xilinx): don't reserve 1 more byte" into integration |
| eb46520c | 06-Sep-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(morello): add cpuidle support" into integration |
| 88b2d813 | 06-Sep-2023 |
Yann Gautier <yann.gautier@st.com> |
Merge "fix(scmi): add parameter for plat_scmi_clock_rates_array" into integration |
| 117b3572 | 06-Sep-2023 |
Yann Gautier <yann.gautier@st.com> |
Merge "feat(imx8m): move the gpc reg & macro to a separate header file" into integration |
| b8f365c3 | 06-Sep-2023 |
Yann Gautier <yann.gautier@st.com> |
Merge "feat(imx8m): add more dram pll setting" into integration |