1# 2# Copyright (c) 2023, Linaro Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include lib/libfdt/libfdt.mk 8include common/fdt_wrappers.mk 9 10PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 11 -I${PLAT_QEMU_COMMON_PATH}/include \ 12 -I${PLAT_QEMU_PATH}/include \ 13 -Iinclude/common/tbbr 14 15ifeq (${ARCH},aarch32) 16QEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S 17else 18QEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \ 19 lib/cpus/aarch64/cortex_a53.S \ 20 lib/cpus/aarch64/cortex_a55.S \ 21 lib/cpus/aarch64/cortex_a57.S \ 22 lib/cpus/aarch64/cortex_a72.S \ 23 lib/cpus/aarch64/cortex_a76.S \ 24 lib/cpus/aarch64/neoverse_n_common.S \ 25 lib/cpus/aarch64/neoverse_n1.S \ 26 lib/cpus/aarch64/neoverse_v1.S \ 27 lib/cpus/aarch64/qemu_max.S 28 29PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} 30endif 31 32PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 33 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 34 drivers/arm/pl011/${ARCH}/pl011_console.S 35 36include lib/xlat_tables_v2/xlat_tables.mk 37PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 38 39ifneq ($(ENABLE_STACK_PROTECTOR), 0) 40 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 41endif 42 43BL1_SOURCES += drivers/io/io_semihosting.c \ 44 drivers/io/io_storage.c \ 45 drivers/io/io_fip.c \ 46 drivers/io/io_memmap.c \ 47 lib/semihosting/semihosting.c \ 48 lib/semihosting/${ARCH}/semihosting_call.S \ 49 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 50 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 51 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c \ 52 ${QEMU_CPU_LIBS} 53 54BL2_SOURCES += drivers/io/io_semihosting.c \ 55 drivers/io/io_storage.c \ 56 drivers/io/io_fip.c \ 57 drivers/io/io_memmap.c \ 58 lib/semihosting/semihosting.c \ 59 lib/semihosting/${ARCH}/semihosting_call.S \ 60 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 61 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 62 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 63 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 64 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 65 common/desc_image_load.c \ 66 common/fdt_fixup.c 67 68BL31_SOURCES += ${QEMU_CPU_LIBS} \ 69 lib/semihosting/semihosting.c \ 70 lib/semihosting/${ARCH}/semihosting_call.S \ 71 plat/common/plat_psci_common.c \ 72 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 73 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 74 common/fdt_fixup.c \ 75 ${QEMU_GIC_SOURCES} 76 77# CPU flag enablement 78ifeq (${ARCH},aarch64) 79 80# Later QEMU versions support SME and SVE. 81# SPM_MM is not compatible with ENABLE_SVE_FOR_NS (build breaks) 82ifeq (${SPM_MM},1) 83 ENABLE_SVE_FOR_NS := 0 84 ENABLE_SME_FOR_NS := 0 85else 86 ENABLE_SVE_FOR_NS := 2 87 ENABLE_SME_FOR_NS := 2 88endif 89 90# QEMU will use the RNDR instruction for the stack protector canary. 91ENABLE_FEAT_RNG := 2 92 93# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max 94ENABLE_FEAT_FGT := 2 95 96# Treating this as a memory-constrained port for now 97USE_COHERENT_MEM := 0 98 99# This can be overridden depending on CPU(s) used in the QEMU image 100HW_ASSISTED_COHERENCY := 1 101 102CTX_INCLUDE_AARCH32_REGS := 0 103ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1) 104$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled") 105endif 106 107# Pointer Authentication sources 108ifeq (${ENABLE_PAUTH}, 1) 109PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 110CTX_INCLUDE_PAUTH_REGS := 1 111endif 112 113endif 114